Unverified Commit 750e0e0a authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Stephen Boyd
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clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc 



After renaming round_rate->determine, kerneldoc does not match anymore,
causing W=1 warnings:

  pll.c:102 function parameter 'req' not described in 'zynqmp_pll_determine_rate'
  pll.c:102 expecting prototype for zynqmp_pll_round_rate(). Prototype was for zynqmp_pll_determine_rate() instead

Fixes: 193650c7 ("clk: zynqmp: pll: convert from round_rate() to determine_rate()")
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: default avatarBrian Masney <bmasney@redhat.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 1b877386

drivers/clk/zynqmp/pll.c

+2 −3
Original line number Diff line number Diff line
@@ -91,10 +91,9 @@ static inline void zynqmp_pll_set_mode(struct clk_hw *hw, bool on) 
}



/**

 * zynqmp_pll_round_rate() - Round a clock frequency

 * zynqmp_pll_determine_rate() - Round a clock frequency

 * @hw:		Handle between common and hardware-specific interfaces

 * @rate:	Desired clock frequency

 * @prate:	Clock frequency of parent clock

 * @req:	Desired clock frequency

 *

 * Return: Frequency closest to @rate the hardware can generate

 */