Commit 76a2ee33 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-renesas', 'clk-rockchip', 'clk-allwinner' and 'clk-cleanup' into clk-next 

* clk-renesas:
  clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1
  clk: renesas: rzg2l: Check reset monitor registers
  clk: renesas: r9a08g045: Add IA55 pclk and its reset
  clk: renesas: rzg2l-cpg: Reuse code in rzg2l_cpg_reset()
  clk: renesas: r8a779g0: Add PCIe clocks
  clk: renesas: r8a779g0: Add EtherTSN clock

* clk-rockchip:
  clk: rockchip: rk3568: Mark pclk_usb as critical
  clk: rockchip: rk3568: Add PLL rate for 126.4MHz
  clk: rockchip: rk3568: Add PLL rate for 115.2MHz

* clk-allwinner:
  clk: sunxi-ng: nkm: remove redundant initialization of tmp_parent

* clk-cleanup:
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: si5341: fix an error code problem in si5341_output_clk_set_rate
  clk: microchip: mpfs-ccc: replace include of asm-generic/errno-base.h
  clk: rs9: Fix DIF OEn bit placement on 9FGV0241
  clk: mmp: pxa168: Fix memory leak in pxa168_clk_init()
  clk: hi3620: Fix memory leak in hi3620_mmc_clk_init()
  clk: sp7021: fix return value check in sp7021_clk_probe()
parents c46104f0 723facbb 72449a90 ee0cf5e0

drivers/clk/clk-renesas-pcie.c

+1 −1
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ static u8 rs9_calc_dif(const struct rs9_driver_data *rs9, int idx) 
	enum rs9_model model = rs9->chip_info->model;



	if (model == RENESAS_9FGV0241)

		return BIT(idx) + 1;

		return BIT(idx + 1);

	else if (model == RENESAS_9FGV0441)

		return BIT(idx);

drivers/clk/clk-si5341.c

+1 −3
Original line number Diff line number Diff line
@@ -895,10 +895,8 @@ static int si5341_output_clk_set_rate(struct clk_hw *hw, unsigned long rate, 
	r[0] = r_div ? (r_div & 0xff) : 1;

	r[1] = (r_div >> 8) & 0xff;

	r[2] = (r_div >> 16) & 0xff;

	err = regmap_bulk_write(output->data->regmap,

	return regmap_bulk_write(output->data->regmap,

			SI5341_OUT_R_REG(output), r, 3);



	return 0;

}



static int si5341_output_reparent(struct clk_si5341_output *output, u8 index)

drivers/clk/clk-sp7021.c

+6 −6
Original line number Diff line number Diff line
@@ -604,14 +604,14 @@ static int sp7021_clk_probe(struct platform_device *pdev) 
	int i;



	clk_base = devm_platform_ioremap_resource(pdev, 0);

	if (!clk_base)

		return -ENXIO;

	if (IS_ERR(clk_base))

		return PTR_ERR(clk_base);

	pll_base = devm_platform_ioremap_resource(pdev, 1);

	if (!pll_base)

		return -ENXIO;

	if (IS_ERR(pll_base))

		return PTR_ERR(pll_base);

	sys_base = devm_platform_ioremap_resource(pdev, 2);

	if (!sys_base)

		return -ENXIO;

	if (IS_ERR(sys_base))

		return PTR_ERR(sys_base);



	/* enable default clks */

	for (i = 0; i < ARRAY_SIZE(sp_clken); i++)

drivers/clk/hisilicon/clk-hi3620.c

+3 −1
Original line number Diff line number Diff line
@@ -466,8 +466,10 @@ static void __init hi3620_mmc_clk_init(struct device_node *node) 
		return;



	clk_data->clks = kcalloc(num, sizeof(*clk_data->clks), GFP_KERNEL);

	if (!clk_data->clks)

	if (!clk_data->clks) {

		kfree(clk_data);

		return;

	}



	for (i = 0; i < num; i++) {

		struct hisi_mmc_clock *mmc_clk = &hi3620_mmc_clks[i];

drivers/clk/microchip/clk-mpfs-ccc.c

+1 −1
Original line number Diff line number Diff line
@@ -4,8 +4,8 @@ 
 *

 * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries

 */

#include "asm-generic/errno-base.h"

#include <linux/clk-provider.h>

#include <linux/errno.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/platform_device.h>