Commit 77dfca70 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/mm' into for-next/core 

* for-next/mm:
  arm64: map [_text, _stext) virtual address range non-executable+read-only
  arm64: Enable vmalloc-huge with ptdump
  arm64: mm: split linear mapping if BBML2 unsupported on secondary CPUs
  arm64: mm: support large block mapping when rodata=full
  arm64: Enable permission change on arm64 kernel block mappings
  arm64/Kconfig: Remove CONFIG_RODATA_FULL_DEFAULT_ENABLED
  arm64: mm: Rework the 'rodata=' options
  arm64: mm: Represent physical memory with phys_addr_t and resource_size_t
  arm64: mm: Make map_fdt() return mapped pointer
  arm64: mm: Cast start/end markers to char *, not u64
parents 30f93868 5973a62e

Documentation/admin-guide/kernel-parameters.txt

+3 −2
Original line number Diff line number Diff line
@@ -6405,8 +6405,9 @@ 
	rodata=		[KNL,EARLY]

		on	Mark read-only kernel memory as read-only (default).

		off	Leave read-only kernel memory writable for debugging.

		full	Mark read-only kernel memory and aliases as read-only

		        [arm64]

		noalias	Mark read-only kernel memory as read-only but retain

			writable aliases in the direct map for regions outside

			of the kernel image. [arm64]



	rockchip.usb_uart

			[EARLY]

arch/arm64/Kconfig

+0 −14
Original line number Diff line number Diff line
@@ -1700,20 +1700,6 @@ config MITIGATE_SPECTRE_BRANCH_HISTORY 
	  When taking an exception from user-space, a sequence of branches

	  or a firmware call overwrites the branch history.



config RODATA_FULL_DEFAULT_ENABLED

	bool "Apply r/o permissions of VM areas also to their linear aliases"

	default y

	help

	  Apply read-only attributes of VM areas to the linear alias of

	  the backing pages as well. This prevents code or read-only data

	  from being modified (inadvertently or intentionally) via another

	  mapping of the same memory page. This additional enhancement can

	  be turned off at runtime by passing rodata=[off|on] (and turned on

	  with rodata=full if this option is set to 'n')



	  This requires the linear region to be mapped down to pages,

	  which may adversely affect performance in some cases.



config ARM64_SW_TTBR0_PAN

	bool "Emulate Privileged Access Never using TTBR0_EL1 switching"

	depends on !KCSAN

arch/arm64/include/asm/cpufeature.h

+2 −0
Original line number Diff line number Diff line
@@ -871,6 +871,8 @@ static inline bool system_supports_pmuv3(void) 
	return cpus_have_final_cap(ARM64_HAS_PMUV3);

}



bool cpu_supports_bbml2_noabort(void);



static inline bool system_supports_bbml2_noabort(void)

{

	return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT);

arch/arm64/include/asm/mmu.h

+3 −0
Original line number Diff line number Diff line
@@ -78,6 +78,9 @@ extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 
			       pgprot_t prot, bool page_mappings_only);

extern void *fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot);

extern void mark_linear_text_alias_ro(void);

extern int split_kernel_leaf_mapping(unsigned long start, unsigned long end);

extern void init_idmap_kpti_bbml2_flag(void);

extern void linear_map_maybe_split_to_ptes(void);



/*

 * This check is triggered during the early boot before the cpufeature

arch/arm64/include/asm/pgtable.h

+5 −0
Original line number Diff line number Diff line
@@ -371,6 +371,11 @@ static inline pmd_t pmd_mkcont(pmd_t pmd) 
	return __pmd(pmd_val(pmd) | PMD_SECT_CONT);

}



static inline pmd_t pmd_mknoncont(pmd_t pmd)

{

	return __pmd(pmd_val(pmd) & ~PMD_SECT_CONT);

}



#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP

static inline int pte_uffd_wp(pte_t pte)

{