Commit 796a9f55 authored by Philipp Stanner's avatar Philipp Stanner
Browse files

drm/sched: Use struct for drm_sched_init() params 



drm_sched_init() has a great many parameters and upcoming new
functionality for the scheduler might add even more. Generally, the
great number of parameters reduces readability and has already caused
one missnaming, addressed in:

commit 6f1cacf4 ("drm/nouveau: Improve variable name in
nouveau_sched_init()").

Introduce a new struct for the scheduler init parameters and port all
users.

Reviewed-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthew Brost <matthew.brost@intel.com> # for Xe
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> # for Panfrost and Panthor
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> # for Etnaviv
Reviewed-by: Frank Binns <frank.binns@imgtec.com> # for Imagination
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> # for Sched
Reviewed-by: Maíra Canal <mcanal@igalia.com> # for v3d
Reviewed-by: default avatarDanilo Krummrich <dakr@kernel.org>
Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> # for amdxdna
Signed-off-by: default avatarPhilipp Stanner <phasta@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211111422.21235-2-phasta@kernel.org
parent 62ae4568

drivers/accel/amdxdna/aie2_ctx.c

+9 −3
Original line number Diff line number Diff line
@@ -516,6 +516,14 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
{

	struct amdxdna_client *client = hwctx->client;

	struct amdxdna_dev *xdna = client->xdna;

	const struct drm_sched_init_args args = {

		.ops = &sched_ops,

		.num_rqs = DRM_SCHED_PRIORITY_COUNT,

		.credit_limit = HWCTX_MAX_CMDS,

		.timeout = msecs_to_jiffies(HWCTX_MAX_TIMEOUT),

		.name = hwctx->name,

		.dev = xdna->ddev.dev,

	};

	struct drm_gpu_scheduler *sched;

	struct amdxdna_hwctx_priv *priv;

	struct amdxdna_gem_obj *heap;
@@ -573,9 +581,7 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx) 
	might_lock(&priv->io_lock);

	fs_reclaim_release(GFP_KERNEL);



	ret = drm_sched_init(sched, &sched_ops, NULL, DRM_SCHED_PRIORITY_COUNT,

			     HWCTX_MAX_CMDS, 0, msecs_to_jiffies(HWCTX_MAX_TIMEOUT),

			     NULL, NULL, hwctx->name, xdna->ddev.dev);

	ret = drm_sched_init(sched, &args);

	if (ret) {

		XDNA_ERR(xdna, "Failed to init DRM scheduler. ret %d", ret);

		goto free_cmd_bufs;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+12 −6
Original line number Diff line number Diff line
@@ -2823,6 +2823,12 @@ static int amdgpu_device_fw_loading(struct amdgpu_device *adev) 


static int amdgpu_device_init_schedulers(struct amdgpu_device *adev)

{

	struct drm_sched_init_args args = {

		.ops = &amdgpu_sched_ops,

		.num_rqs = DRM_SCHED_PRIORITY_COUNT,

		.timeout_wq = adev->reset_domain->wq,

		.dev = adev->dev,

	};

	long timeout;

	int r, i;
@@ -2848,12 +2854,12 @@ static int amdgpu_device_init_schedulers(struct amdgpu_device *adev) 
			break;

		}



		r = drm_sched_init(&ring->sched, &amdgpu_sched_ops, NULL,

				   DRM_SCHED_PRIORITY_COUNT,

				   ring->num_hw_submission, 0,

				   timeout, adev->reset_domain->wq,

				   ring->sched_score, ring->name,

				   adev->dev);

		args.timeout = timeout;

		args.credit_limit = ring->num_hw_submission;

		args.score = ring->sched_score;

		args.name = ring->name;



		r = drm_sched_init(&ring->sched, &args);

		if (r) {

			DRM_ERROR("Failed to create scheduler on ring %s.\n",

				  ring->name);

drivers/gpu/drm/etnaviv/etnaviv_sched.c

+11 −11
Original line number Diff line number Diff line
@@ -144,17 +144,17 @@ int etnaviv_sched_push_job(struct etnaviv_gem_submit *submit) 


int etnaviv_sched_init(struct etnaviv_gpu *gpu)

{

	int ret;



	ret = drm_sched_init(&gpu->sched, &etnaviv_sched_ops, NULL,

			     DRM_SCHED_PRIORITY_COUNT,

			     etnaviv_hw_jobs_limit, etnaviv_job_hang_limit,

			     msecs_to_jiffies(500), NULL, NULL,

			     dev_name(gpu->dev), gpu->dev);

	if (ret)

		return ret;

	const struct drm_sched_init_args args = {

		.ops = &etnaviv_sched_ops,

		.num_rqs = DRM_SCHED_PRIORITY_COUNT,

		.credit_limit = etnaviv_hw_jobs_limit,

		.hang_limit = etnaviv_job_hang_limit,

		.timeout = msecs_to_jiffies(500),

		.name = dev_name(gpu->dev),

		.dev = gpu->dev,

	};



	return 0;

	return drm_sched_init(&gpu->sched, &args);

}



void etnaviv_sched_fini(struct etnaviv_gpu *gpu)

drivers/gpu/drm/imagination/pvr_queue.c

+12 −6
Original line number Diff line number Diff line
@@ -1210,6 +1210,17 @@ struct pvr_queue *pvr_queue_create(struct pvr_context *ctx, 
		},

	};

	struct pvr_device *pvr_dev = ctx->pvr_dev;

	const struct drm_sched_init_args sched_args = {

		.ops = &pvr_queue_sched_ops,

		.submit_wq = pvr_dev->sched_wq,

		.num_rqs = 1,

		.credit_limit = 64 * 1024,

		.hang_limit = 1,

		.timeout = msecs_to_jiffies(500),

		.timeout_wq = pvr_dev->sched_wq,

		.name = "pvr-queue",

		.dev = pvr_dev->base.dev,

	};

	struct drm_gpu_scheduler *sched;

	struct pvr_queue *queue;

	int ctx_state_size, err;
@@ -1282,12 +1293,7 @@ struct pvr_queue *pvr_queue_create(struct pvr_context *ctx, 


	queue->timeline_ufo.value = cpu_map;



	err = drm_sched_init(&queue->scheduler,

			     &pvr_queue_sched_ops,

			     pvr_dev->sched_wq, 1, 64 * 1024, 1,

			     msecs_to_jiffies(500),

			     pvr_dev->sched_wq, NULL, "pvr-queue",

			     pvr_dev->base.dev);

	err = drm_sched_init(&queue->scheduler, &sched_args);

	if (err)

		goto err_release_ufo;

drivers/gpu/drm/lima/lima_sched.c

+10 −6
Original line number Diff line number Diff line
@@ -515,18 +515,22 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) 
{

	unsigned int timeout = lima_sched_timeout_ms > 0 ?

			       lima_sched_timeout_ms : 10000;

	const struct drm_sched_init_args args = {

		.ops = &lima_sched_ops,

		.num_rqs = DRM_SCHED_PRIORITY_COUNT,

		.credit_limit = 1,

		.hang_limit = lima_job_hang_limit,

		.timeout = msecs_to_jiffies(timeout),

		.name = name,

		.dev = pipe->ldev->dev,

	};



	pipe->fence_context = dma_fence_context_alloc(1);

	spin_lock_init(&pipe->fence_lock);



	INIT_WORK(&pipe->recover_work, lima_sched_recover_work);



	return drm_sched_init(&pipe->base, &lima_sched_ops, NULL,

			      DRM_SCHED_PRIORITY_COUNT,

			      1,

			      lima_job_hang_limit,

			      msecs_to_jiffies(timeout), NULL,

			      NULL, name, pipe->ldev->dev);

	return drm_sched_init(&pipe->base, &args);

}



void lima_sched_pipe_fini(struct lima_sched_pipe *pipe)