Commit 7c7f5503 authored by Yeoreum Yun's avatar Yeoreum Yun Committed by Catalin Marinas
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arm64: Report address tag when FEAT_MTE_TAGGED_FAR is supported



If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault address
are preserved in response to synchronous tag check faults (SEGV_MTESERR).

This patch modifies below to support this feature:
  - Use the original FAR_EL1 value when an MTE tag check fault occurs,
    if ARM64_MTE_FAR is supported so that not only logical tag
    (bits 59:56) but also address tag (bits 63:60] being reported too.

  - Add HWCAP for mtefar to let user know bits 63:60 includes
    address tag information when when FEAT_MTE_TAGGED_FAR is supported.

Applications that require this information should install
a signal handler with the SA_EXPOSE_TAGBITS flag.
While this introduces a minor ABI change,
most applications do not set this flag and therefore will not be affected.

Signed-off-by: default avatarYeoreum Yun <yeoreum.yun@arm.com>
Link: https://lore.kernel.org/r/20250618084513.1761345-3-yeoreum.yun@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 66984536
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+3 −0
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@@ -435,6 +435,9 @@ HWCAP2_SME_SF8DP4
HWCAP2_POE
    Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001.

HWCAP3_MTE_FAR
    Functionality implied by ID_AA64PFR2_EL1.MTEFAR == 0b0001.

4. Unused AT_HWCAP bits
-----------------------

+6 −5
Original line number Diff line number Diff line
@@ -60,11 +60,12 @@ that signal handlers in applications making use of tags cannot rely
on the tag information for user virtual addresses being maintained
in these fields unless the flag was set.

Due to architecture limitations, bits 63:60 of the fault address
are not preserved in response to synchronous tag check faults
(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should
treat the values of these bits as undefined in order to accommodate
future architecture revisions which may preserve the bits.
If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault address
are preserved in response to synchronous tag check faults (SEGV_MTESERR)
otherwise not preserved even if SA_EXPOSE_TAGBITS was set.
Applications should interpret the values of these bits based on
the support for the HWCAP3_MTE_FAR. If the support is not present,
the values of these bits should be considered as undefined otherwise valid.

For signals raised in response to watchpoint debug exceptions, the
tag information will be preserved regardless of the SA_EXPOSE_TAGBITS
+1 −0
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@@ -176,6 +176,7 @@
#define KERNEL_HWCAP_POE		__khwcap2_feature(POE)

#define __khwcap3_feature(x)		(const_ilog2(HWCAP3_ ## x) + 128)
#define KERNEL_HWCAP_MTE_FAR		__khwcap3_feature(MTE_FAR)

/*
 * This yields a mask that user programs can use to figure out what
+1 −0
Original line number Diff line number Diff line
@@ -143,5 +143,6 @@
/*
 * HWCAP3 flags - for AT_HWCAP3
 */
#define HWCAP3_MTE_FAR		(1UL << 0)

#endif /* _UAPI__ASM_HWCAP_H */
+1 −0
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@@ -3219,6 +3219,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
#ifdef CONFIG_ARM64_MTE
	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE),
	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3),
	HWCAP_CAP(ID_AA64PFR2_EL1, MTEFAR, IMP, CAP_HWCAP, KERNEL_HWCAP_MTE_FAR),
#endif /* CONFIG_ARM64_MTE */
	HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV),
	HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP),
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