Commit 8299ee7f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-next-2025-09-12' of https://gitlab.freedesktop.org/drm/msm into drm-next



Changes for v6.18

GPU and Core:
- in DT bindings describe clocks per GPU type
- GMU bandwidth voting for x1-85
- a663 speedbins
- a623 speedbins
- cleanup some remaining no-iommu leftovers after VM_BIND conversion
- fix GEM obj 32b size truncation
- add missing VM_BIND param validation
- various fixes
- IFPC for x1-85 and a750
- register xml and gen_header.py sync from mesa

Display:
- add missing bindings for display on SC8180X
- added DisplayPort MST bindings
- conversion from round_rate() to determine_rate()
- DSI PHY fixes, correcting programming glitches
- misc small fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <rob.clark@oss.qualcomm.com>
Link: https://lore.kernel.org/r/CACSVV01FgXN+fD6U1Hi6Tj4WCf=V-+NO8BXi+80iS4qOZwpaGg@mail.gmail.com
parents 0d9f0083 b5bad77e
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+130 −16
Original line number Diff line number Diff line
@@ -29,15 +29,30 @@ properties:
          - qcom,sdm845-dp
          - qcom,sm8350-dp
          - qcom,sm8650-dp
          - qcom,x1e80100-dp

      - items:
          - enum:
              - qcom,sm6350-dp
          - const: qcom,sc7180-dp

      # deprecated entry for compatibility with old DT
      - items:
          - enum:
              - qcom,sar2130p-dp
              - qcom,sm6350-dp
          - const: qcom,sm8350-dp
        deprecated: true

      - items:
          - enum:
              - qcom,sar2130p-dp
              - qcom,sm7150-dp
              - qcom,sm8150-dp
              - qcom,sm8250-dp
              - qcom,sm8450-dp
              - qcom,sm8550-dp
          - const: qcom,sm8350-dp

      - items:
          - enum:
              - qcom,sm8750-dp
@@ -51,35 +66,37 @@ properties:
      - description: link register block
      - description: p0 register block
      - description: p1 register block
      - description: p2 register block
      - description: p3 register block
      - description: mst2link register block
      - description: mst3link register block

  interrupts:
    maxItems: 1

  clocks:
    minItems: 5
    items:
      - description: AHB clock to enable register access
      - description: Display Port AUX clock
      - description: Display Port Link clock
      - description: Link interface clock between DP and PHY
      - description: Display Port Pixel clock
      - description: Display Port stream 0 Pixel clock
      - description: Display Port stream 1 Pixel clock
      - description: Display Port stream 2 Pixel clock
      - description: Display Port stream 3 Pixel clock

  clock-names:
    minItems: 5
    items:
      - const: core_iface
      - const: core_aux
      - const: ctrl_link
      - const: ctrl_link_iface
      - const: stream_pixel

  assigned-clocks:
    items:
      - description: link clock source
      - description: pixel clock source

  assigned-clock-parents:
    items:
      - description: phy 0 parent
      - description: phy 1 parent
      - const: stream_1_pixel
      - const: stream_2_pixel
      - const: stream_3_pixel

  phys:
    maxItems: 1
@@ -161,7 +178,6 @@ required:
allOf:
  # AUX BUS does not exist on DP controllers
  # Audio output also is present only on DP output
  # p1 regions is present on DP, but not on eDP
  - if:
      properties:
        compatible:
@@ -173,14 +189,112 @@ allOf:
    then:
      properties:
        "#sound-dai-cells": false
    else:
      if:
        properties:
          compatible:
            contains:
              enum:
                - qcom,sa8775p-dp
                - qcom,x1e80100-dp
      then:
        oneOf:
          - required:
              - aux-bus
          - required:
              - "#sound-dai-cells"
      else:
        properties:
          aux-bus: false
        reg:
          minItems: 5
        required:
          - "#sound-dai-cells"

  - if:
      properties:
        compatible:
          contains:
            enum:
              # these platforms support SST only
              - qcom,sc7180-dp
              - qcom,sc7280-dp
              - qcom,sc7280-edp
              - qcom,sc8180x-edp
              - qcom,sc8280xp-edp
    then:
      properties:
        reg:
          minItems: 5
          maxItems: 5
        clocks:
          minItems: 5
          maxItems: 5
        clocks-names:
          minItems: 5
          maxItems: 5

  - if:
      properties:
        compatible:
          contains:
            enum:
              # these platforms support 2 streams MST on some interfaces,
              # others are SST only
              - qcom,sc8280xp-dp
              - qcom,x1e80100-dp
    then:
      properties:
        reg:
          minItems: 5
          maxItems: 5
        clocks:
          minItems: 5
          maxItems: 6
        clocks-names:
          minItems: 5
          maxItems: 6

  - if:
      properties:
        compatible:
          contains:
            # 2 streams MST
            enum:
              - qcom,sc8180x-dp
              - qcom,sdm845-dp
              - qcom,sm8350-dp
              - qcom,sm8650-dp
    then:
      properties:
        reg:
          minItems: 5
          maxItems: 5
        clocks:
          minItems: 6
          maxItems: 6
        clocks-names:
          minItems: 6
          maxItems: 6

  - if:
      properties:
        compatible:
          contains:
            enum:
              # these platforms support 4 stream MST on first DP,
              # 2 streams MST on the second one.
              - qcom,sa8775p-dp
    then:
      properties:
        reg:
          minItems: 9
          maxItems: 9
        clocks:
          minItems: 6
          maxItems: 8
        clocks-names:
          minItems: 6
          maxItems: 8

additionalProperties: false

examples:
+2 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ properties:
              - qcom,sar2130p-dsi-ctrl
              - qcom,sc7180-dsi-ctrl
              - qcom,sc7280-dsi-ctrl
              - qcom,sc8180x-dsi-ctrl
              - qcom,sdm660-dsi-ctrl
              - qcom,sdm670-dsi-ctrl
              - qcom,sdm845-dsi-ctrl
@@ -332,6 +333,7 @@ allOf:
              - qcom,sar2130p-dsi-ctrl
              - qcom,sc7180-dsi-ctrl
              - qcom,sc7280-dsi-ctrl
              - qcom,sc8180x-dsi-ctrl
              - qcom,sdm845-dsi-ctrl
              - qcom,sm6115-dsi-ctrl
              - qcom,sm6125-dsi-ctrl
+34 −0
Original line number Diff line number Diff line
@@ -124,6 +124,40 @@ allOf:
          contains:
            enum:
              - qcom,adreno-gmu-623.0
    then:
      properties:
        reg:
          items:
            - description: Core GMU registers
            - description: Resource controller registers
            - description: GMU PDC registers
        reg-names:
          items:
            - const: gmu
            - const: rscc
            - const: gmu_pdc
        clocks:
          items:
            - description: GMU clock
            - description: GPU CX clock
            - description: GPU AXI clock
            - description: GPU MEMNOC clock
            - description: GPU AHB clock
            - description: GPU HUB CX clock
        clock-names:
          items:
            - const: gmu
            - const: cxo
            - const: axi
            - const: memnoc
            - const: ahb
            - const: hub

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,adreno-gmu-635.0
              - qcom,adreno-gmu-660.1
              - qcom,adreno-gmu-663.0
+198 −25
Original line number Diff line number Diff line
@@ -146,17 +146,93 @@ allOf:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
            oneOf:
              - pattern: '^qcom,adreno-305\.[0-9]+$'
              - pattern: '^qcom,adreno-330\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          items:
            - const: core
              description: GPU Core clock
            - const: iface
              description: GPU Interface clock
            - const: mem_iface
              description: GPU Memory Interface clock

  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-306\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 7
          minItems: 5
          maxItems: 6
        clock-names:
          oneOf:
            - items:
                - const: core
                  description: GPU Core clock
                - const: iface
                  description: GPU Interface clock
                - const: mem_iface
                  description: GPU Memory Interface clock
                - const: alt_mem_iface
                  description: GPU Alternative Memory Interface clock
                - const: gfx3d
                  description: GPU 3D engine clock
            - items:
                - const: core
                  description: GPU Core clock
                - const: iface
                  description: GPU Interface clock
                - const: mem
                  description: GPU Memory clock
                - const: mem_iface
                  description: GPU Memory Interface clock
                - const: alt_mem_iface
                  description: GPU Alternative Memory Interface clock
                - const: gfx3d
                  description: GPU 3D engine clock

  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-320\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 4
          maxItems: 4
        clock-names:
          items:
            - const: core
              description: GPU Core clock
            - const: iface
              description: GPU Interface clock
            - const: mem
              description: GPU Memory clock
            - const: mem_iface
              description: GPU Memory Interface clock

  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-405\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 7
          maxItems: 7
        clock-names:
          items:
            anyOf:
            - const: core
              description: GPU Core clock
            - const: iface
@@ -171,14 +247,108 @@ allOf:
              description: GPU 3D engine clock
            - const: rbbmtimer
              description: GPU RBBM Timer for Adreno 5xx series

  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-50[56]\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 6
          maxItems: 6
        clock-names:
          items:
            - const: core
              description: GPU Core clock
            - const: iface
              description: GPU Interface clock
            - const: mem_iface
              description: GPU Memory Interface clock
            - const: alt_mem_iface
              description: GPU Alternative Memory Interface clock
            - const: rbbmtimer
              description: GPU RBBM Timer for Adreno 5xx series
            - const: alwayson
              description: GPU AON clock

  - if:
      properties:
        compatible:
          contains:
            oneOf:
              - pattern: '^qcom,adreno-508\.[0-9]+$'
              - pattern: '^qcom,adreno-509\.[0-9]+$'
              - pattern: '^qcom,adreno-512\.[0-9]+$'
              - pattern: '^qcom,adreno-540\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 6
          maxItems: 6
        clock-names:
          items:
            - const: iface
              description: GPU Interface clock
            - const: rbbmtimer
              description: GPU RBBM Timer for Adreno 5xx series
            - const: mem
              description: GPU Memory clock
            - const: mem_iface
              description: GPU Memory Interface clock
            - const: rbcpr
              description: GPU RB Core Power Reduction clock
          minItems: 2
          maxItems: 7
            - const: core
              description: GPU Core clock

      required:
        - clocks
        - clock-names
  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-510\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 6
          maxItems: 6
        clock-names:
          items:
            - const: core
              description: GPU Core clock
            - const: iface
              description: GPU Interface clock
            - const: mem
              description: GPU Memory clock
            - const: mem_iface
              description: GPU Memory Interface clock
            - const: rbbmtimer
              description: GPU RBBM Timer for Adreno 5xx series
            - const: alwayson
              description: GPU AON clock

  - if:
      properties:
        compatible:
          contains:
            pattern: '^qcom,adreno-530\.[0-9]+$'
    then:
      properties:
        clocks:
          minItems: 5
          maxItems: 5
        clock-names:
          items:
            - const: core
              description: GPU Core clock
            - const: iface
              description: GPU Interface clock
            - const: rbbmtimer
              description: GPU RBBM Timer for Adreno 5xx series
            - const: mem
              description: GPU Memory clock
            - const: mem_iface
              description: GPU Memory Interface clock

  - if:
      properties:
@@ -187,6 +357,7 @@ allOf:
            enum:
              - qcom,adreno-610.0
              - qcom,adreno-619.1
              - qcom,adreno-07000200
    then:
      properties:
        clocks:
@@ -222,7 +393,9 @@ allOf:
        properties:
          compatible:
            contains:
              pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'
              oneOf:
                - pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'
                - pattern: '^qcom,adreno-[0-9a-f]{8}$'

      then: # Starting with A6xx, the clocks are usually defined in the GMU node
        properties:
+21 −5
Original line number Diff line number Diff line
@@ -375,7 +375,11 @@ examples:
                  <0xaf54200 0x0c0>,
                  <0xaf55000 0x770>,
                  <0xaf56000 0x09c>,
                  <0xaf57000 0x09c>;
                  <0xaf57000 0x09c>,
                  <0xaf58000 0x09c>,
                  <0xaf59000 0x09c>,
                  <0xaf5a000 0x23c>,
                  <0xaf5b000 0x23c>;

            interrupt-parent = <&mdss0>;
            interrupts = <12>;
@@ -384,16 +388,28 @@ examples:
                     <&dispcc_dptx0_aux_clk>,
                     <&dispcc_dptx0_link_clk>,
                     <&dispcc_dptx0_link_intf_clk>,
                     <&dispcc_dptx0_pixel0_clk>;
                     <&dispcc_dptx0_pixel0_clk>,
                     <&dispcc_dptx0_pixel1_clk>,
                     <&dispcc_dptx0_pixel2_clk>,
                     <&dispcc_dptx0_pixel3_clk>;
            clock-names = "core_iface",
                          "core_aux",
                          "ctrl_link",
                          "ctrl_link_iface",
                          "stream_pixel";
                          "stream_pixel",
                          "stream_1_pixel",
                          "stream_2_pixel",
                          "stream_3_pixel";

            assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>,
                              <&dispcc_mdss_dptx0_pixel0_clk_src>;
            assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;
                              <&dispcc_mdss_dptx0_pixel0_clk_src>,
                              <&dispcc_mdss_dptx0_pixel1_clk_src>,
                              <&dispcc_mdss_dptx0_pixel2_clk_src>,
                              <&dispcc_mdss_dptx0_pixel3_clk_src>;
            assigned-clock-parents = <&mdss0_dp0_phy 0>,
                                     <&mdss0_dp0_phy 1>,
                                     <&mdss0_dp0_phy 1>,
                                     <&mdss0_dp0_phy 1>;

            phys = <&mdss0_dp0_phy>;
            phy-names = "dp";
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