Commit 855bde8c authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Martin K. Petersen
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scsi: ufs: renesas: Remove register control helper function 



After refactoring the code, ufs_renesas_reg_control() is no longer needed,
because all operations are simple and can be called directly.  Remove the
ufs_renesas_reg_control() helper function, and call udelay() directly.

Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/69500e4c18be1ca1de360f9e797e282ffef04004.1741179611.git.geert+renesas@glider.be


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 5129aa62

drivers/ufs/host/ufs-renesas.c

+14 −88
Original line number Diff line number Diff line
@@ -23,106 +23,32 @@ struct ufs_renesas_priv { 
	bool initialized;	/* The hardware needs initialization once */

};



enum ufs_renesas_init_param_mode {

	MODE_POLL,

	MODE_READ,

	MODE_WAIT,

	MODE_WRITE,

};



struct ufs_renesas_init_param {

	enum ufs_renesas_init_param_mode mode;

	u32 reg;

	union {

		u32 expected;

		u32 delay_us;

		u32 val;

	} u;

	u32 mask;

	u32 index;

};



static void ufs_renesas_dbg_register_dump(struct ufs_hba *hba)

{

	ufshcd_dump_regs(hba, 0xc0, 0x40, "regs: 0xc0 + ");

}



static u32 ufs_renesas_reg_control(struct ufs_hba *hba,

				   const struct ufs_renesas_init_param *p)

static void ufs_renesas_poll(struct ufs_hba *hba, u32 reg, u32 expected, u32 mask)

{

	u32 val = 0;

	int ret;

	u32 val;



	switch (p->mode) {

	case MODE_POLL:

		ret = readl_poll_timeout_atomic(hba->mmio_base + p->reg,

						val,

						(val & p->mask) == p->u.expected,

	ret = readl_poll_timeout_atomic(hba->mmio_base + reg,

					val, (val & mask) == expected,

					10, 1000);

	if (ret)

		dev_err(hba->dev, "%s: poll failed %d (%08x, %08x, %08x)\n",

				__func__, ret, val, p->mask, p->u.expected);

		break;

	case MODE_READ:

		val = ufshcd_readl(hba, p->reg);

		break;

	case MODE_WAIT:

		if (p->u.delay_us > 1000)

			mdelay(DIV_ROUND_UP(p->u.delay_us, 1000));

		else

			udelay(p->u.delay_us);

		break;

	case MODE_WRITE:

		ufshcd_writel(hba, p->u.val, p->reg);

		break;

	default:

		break;

	}



	return val;

}



static void ufs_renesas_poll(struct ufs_hba *hba, u32 reg, u32 expected, u32 mask)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_POLL,

		.reg = reg,

		.u.expected = expected,

		.mask = mask,

	};



	ufs_renesas_reg_control(hba, &param);

			__func__, ret, val, mask, expected);

}



static u32 ufs_renesas_read(struct ufs_hba *hba, u32 reg)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_READ,

		.reg = reg,

	};



	return ufs_renesas_reg_control(hba, &param);

}



static void ufs_renesas_wait(struct ufs_hba *hba, u32 delay_us)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_WAIT,

		.u.delay_us = delay_us,

	};



	ufs_renesas_reg_control(hba, &param);

	return ufshcd_readl(hba, reg);

}



static void ufs_renesas_write(struct ufs_hba *hba, u32 reg, u32 value)

{

	struct ufs_renesas_init_param param = {

		.mode = MODE_WRITE,

		.reg = reg,

		.u.val = value,

	};



	ufs_renesas_reg_control(hba, &param);

	ufshcd_writel(hba, value, reg);

}



static void ufs_renesas_write_d0_d4(struct ufs_hba *hba, u32 data_d0, u32 data_d4)
@@ -216,13 +142,13 @@ static void ufs_renesas_pre_init(struct ufs_hba *hba) 
	/* This setting is for SERIES B */

	ufs_renesas_write(hba, 0xc0, 0x49425308);

	ufs_renesas_write_d0_d4(hba, 0x00000104, 0x00000002);

	ufs_renesas_wait(hba, 1);

	udelay(1);

	ufs_renesas_write_d0_d4(hba, 0x00000828, 0x00000200);

	ufs_renesas_wait(hba, 1);

	udelay(1);

	ufs_renesas_write_d0_d4(hba, 0x00000828, 0x00000000);

	ufs_renesas_write_d0_d4(hba, 0x00000104, 0x00000001);

	ufs_renesas_write_d0_d4(hba, 0x00000940, 0x00000001);

	ufs_renesas_wait(hba, 1);

	udelay(1);

	ufs_renesas_write_d0_d4(hba, 0x00000940, 0x00000000);



	ufs_renesas_write(hba, 0xc0, 0x49425308);