Commit 87768582 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'dma-mapping-7.1-2026-04-16' of... 

Merge tag 'dma-mapping-7.1-2026-04-16' of git://git.kernel.org/pub/scm/linux/kernel/git/mszyprowski/linux

Pull dma-mapping updates from Marek Szyprowski:

 - added support for batched cache sync, what improves performance of
   dma_map/unmap_sg() operations on ARM64 architecture (Barry Song)

 - introduced DMA_ATTR_CC_SHARED attribute for explicitly shared memory
   used in confidential computing (Jiri Pirko)

 - refactored spaghetti-like code in drivers/of/of_reserved_mem.c and
   its clients (Marek Szyprowski, shared branch with device-tree updates
   to avoid merge conflicts)

 - prepared Contiguous Memory Allocator related code for making dma-buf
   drivers modularized (Maxime Ripard)

 - added support for benchmarking dma_map_sg() calls to tools/dma
   utility (Qinxin Xia)

* tag 'dma-mapping-7.1-2026-04-16' of git://git.kernel.org/pub/scm/linux/kernel/git/mszyprowski/linux: (24 commits)
  dma-buf: heaps: system: document system_cc_shared heap
  dma-buf: heaps: system: add system_cc_shared heap for explicitly shared memory
  dma-mapping: introduce DMA_ATTR_CC_SHARED for shared memory
  mm: cma: Export cma_alloc(), cma_release() and cma_get_name()
  dma: contiguous: Export dev_get_cma_area()
  dma: contiguous: Make dma_contiguous_default_area static
  dma: contiguous: Make dev_get_cma_area() a proper function
  dma: contiguous: Turn heap registration logic around
  of: reserved_mem: rework fdt_init_reserved_mem_node()
  of: reserved_mem: clarify fdt_scan_reserved_mem*() functions
  of: reserved_mem: rearrange code a bit
  of: reserved_mem: replace CMA quirks by generic methods
  of: reserved_mem: switch to ops based OF_DECLARE()
  of: reserved_mem: use -ENODEV instead of -ENOENT
  of: reserved_mem: remove fdt node from the structure
  dma-mapping: fix false kernel-doc comment marker
  dma-mapping: Support batch mode for dma_direct_{map,unmap}_sg
  dma-mapping: Separate DMA sync issuing and completion waiting
  arm64: Provide dcache_inval_poc_nosync helper
  arm64: Provide dcache_clean_poc_nosync helper
  ...
parents d662a710 15818b2c

Documentation/userspace-api/dma-buf-heaps.rst

+7 −0
Original line number Diff line number Diff line
@@ -16,6 +16,13 @@ following heaps: 


 - The ``system`` heap allocates virtually contiguous, cacheable, buffers.



 - The ``system_cc_shared`` heap allocates virtually contiguous, cacheable,

   buffers using shared (decrypted) memory. It is only present on

   confidential computing (CoCo) VMs where memory encryption is active

   (e.g., AMD SEV, Intel TDX). The allocated pages have the encryption

   bit cleared, making them accessible for device DMA without TDISP

   support. On non-CoCo VM configurations, this heap is not registered.



 - The ``default_cma_region`` heap allocates physically contiguous,

   cacheable, buffers. Only present if a CMA region is present. Such a

   region is usually created either through the kernel commandline

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ config ARM64 
	select ARCH_HAS_STRICT_MODULE_RWX

	select ARCH_HAS_SYNC_DMA_FOR_DEVICE

	select ARCH_HAS_SYNC_DMA_FOR_CPU

	select ARCH_HAS_BATCHED_DMA_SYNC

	select ARCH_HAS_SYSCALL_WRAPPER

	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST

	select ARCH_HAS_ZONE_DMA_SET if EXPERT

arch/arm64/include/asm/assembler.h

+19 −6
Original line number Diff line number Diff line
@@ -371,14 +371,13 @@ alternative_endif 
 * [start, end) with dcache line size explicitly provided.

 *

 * 	op:		operation passed to dc instruction

 * 	domain:		domain used in dsb instruction

 * 	start:          starting virtual address of the region

 * 	end:            end virtual address of the region

 *	linesz:		dcache line size

 * 	fixup:		optional label to branch to on user fault

 * 	Corrupts:       start, end, tmp

 */

	.macro dcache_by_myline_op op, domain, start, end, linesz, tmp, fixup

	.macro dcache_by_myline_op_nosync op, start, end, linesz, tmp, fixup

	sub	\tmp, \linesz, #1

	bic	\start, \start, \tmp

alternative_if ARM64_WORKAROUND_4311569
@@ -412,14 +411,28 @@ alternative_if ARM64_WORKAROUND_4311569 
	cbnz	\start, .Ldcache_op\@

	.endif

alternative_else_nop_endif

	dsb	\domain



	_cond_uaccess_extable .Ldcache_op\@, \fixup

	.endm



/*

 * Macro to perform a data cache maintenance for the interval

 * [start, end)

 * [start, end) without waiting for completion

 *

 * 	op:		operation passed to dc instruction

 * 	start:          starting virtual address of the region

 * 	end:            end virtual address of the region

 * 	fixup:		optional label to branch to on user fault

 * 	Corrupts:       start, end, tmp1, tmp2

 */

	.macro dcache_by_line_op_nosync op, start, end, tmp1, tmp2, fixup

	dcache_line_size \tmp1, \tmp2

	dcache_by_myline_op_nosync \op, \start, \end, \tmp1, \tmp2, \fixup

	.endm



/*

 * Macro to perform a data cache maintenance for the interval

 * [start, end) and wait for completion

 *

 * 	op:		operation passed to dc instruction

 * 	domain:		domain used in dsb instruction
@@ -429,8 +442,8 @@ alternative_else_nop_endif 
 * 	Corrupts:       start, end, tmp1, tmp2

 */

	.macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup

	dcache_line_size \tmp1, \tmp2

	dcache_by_myline_op \op, \domain, \start, \end, \tmp1, \tmp2, \fixup

	dcache_by_line_op_nosync \op, \start, \end, \tmp1, \tmp2, \fixup

	dsb \domain

	.endm



/*

arch/arm64/include/asm/cache.h

+5 −0
Original line number Diff line number Diff line
@@ -87,6 +87,11 @@ int cache_line_size(void); 


#define dma_get_cache_alignment	cache_line_size



static inline void arch_sync_dma_flush(void)

{

	dsb(sy);

}



/* Compress a u64 MPIDR value into 32 bits. */

static inline u64 arch_compact_of_hwid(u64 id)

{

arch/arm64/include/asm/cacheflush.h

+2 −0
Original line number Diff line number Diff line
@@ -74,6 +74,8 @@ extern void icache_inval_pou(unsigned long start, unsigned long end); 
extern void dcache_clean_inval_poc(unsigned long start, unsigned long end);

extern void dcache_inval_poc(unsigned long start, unsigned long end);

extern void dcache_clean_poc(unsigned long start, unsigned long end);

extern void dcache_inval_poc_nosync(unsigned long start, unsigned long end);

extern void dcache_clean_poc_nosync(unsigned long start, unsigned long end);

extern void dcache_clean_pop(unsigned long start, unsigned long end);

extern void dcache_clean_pou(unsigned long start, unsigned long end);

extern long caches_clean_inval_user_pou(unsigned long start, unsigned long end);