Commit 879b141b authored by Joerg Roedel's avatar Joerg Roedel
Browse files

Merge branches 'fixes', 'apple/dart', 'arm/smmu/updates', 'arm/smmu/bindings',... 

Merge branches 'fixes', 'apple/dart', 'arm/smmu/updates', 'arm/smmu/bindings', 'fsl/pamu', 'mediatek', 'renesas/ipmmu', 's390', 'intel/vt-d', 'amd/amd-vi' and 'core' into next
parents a5806cd5 b3f6fcd8 c6f0d53e 70892277 b3f3c493 04cfc1ae bdcea7e3 33647d0b 81244074 320302ba 51c33f33 5e2ff240

Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml

+4 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ properties: 
          - mediatek,mt2712-m4u  # generation two

          - mediatek,mt6779-m4u  # generation two

          - mediatek,mt6795-m4u  # generation two

          - mediatek,mt6893-iommu-mm         # generation two

          - mediatek,mt8167-m4u  # generation two

          - mediatek,mt8173-m4u  # generation two

          - mediatek,mt8183-m4u  # generation two
@@ -131,6 +132,7 @@ properties: 
      dt-binding/memory/mt2712-larb-port.h for mt2712,

      dt-binding/memory/mt6779-larb-port.h for mt6779,

      dt-binding/memory/mt6795-larb-port.h for mt6795,

      dt-binding/memory/mediatek,mt6893-memory-port.h for mt6893,

      dt-binding/memory/mt8167-larb-port.h for mt8167,

      dt-binding/memory/mt8173-larb-port.h for mt8173,

      dt-binding/memory/mt8183-larb-port.h for mt8183,
@@ -157,6 +159,7 @@ allOf: 
              - mediatek,mt2701-m4u

              - mediatek,mt2712-m4u

              - mediatek,mt6795-m4u

              - mediatek,mt6893-iommu-mm

              - mediatek,mt8173-m4u

              - mediatek,mt8186-iommu-mm

              - mediatek,mt8188-iommu-vdo
@@ -173,6 +176,7 @@ allOf: 
      properties:

        compatible:

          enum:

            - mediatek,mt6893-iommu-mm

            - mediatek,mt8186-iommu-mm

            - mediatek,mt8188-iommu-vdo

            - mediatek,mt8188-iommu-vpp

arch/s390/include/asm/pci_dma.h

+3 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ enum zpci_ioat_dtype { 
#define ZPCI_KEY			(PAGE_DEFAULT_KEY << 5)



#define ZPCI_TABLE_SIZE_RT	(1UL << 42)

#define ZPCI_TABLE_SIZE_RS	(1UL << 53)



#define ZPCI_IOTA_STO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)

#define ZPCI_IOTA_RTTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
@@ -55,6 +56,8 @@ enum zpci_ioat_dtype { 
#define ZPCI_PT_BITS			8

#define ZPCI_ST_SHIFT			(ZPCI_PT_BITS + PAGE_SHIFT)

#define ZPCI_RT_SHIFT			(ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)

#define ZPCI_RS_SHIFT			(ZPCI_RT_SHIFT + ZPCI_TABLE_BITS)

#define ZPCI_RF_SHIFT			(ZPCI_RS_SHIFT + ZPCI_TABLE_BITS)



#define ZPCI_RTE_FLAG_MASK		0x3fffUL

#define ZPCI_RTE_ADDR_MASK		(~ZPCI_RTE_FLAG_MASK)

drivers/accel/amdxdna/aie2_pci.c

+2 −11
Original line number Diff line number Diff line
@@ -512,12 +512,6 @@ static int aie2_init(struct amdxdna_dev *xdna) 
		goto release_fw;

	}



	ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);

	if (ret) {

		XDNA_ERR(xdna, "Enable PASID failed, ret %d", ret);

		goto free_irq;

	}



	psp_conf.fw_size = fw->size;

	psp_conf.fw_buf = fw->data;

	for (i = 0; i < PSP_MAX_REGS; i++)
@@ -526,14 +520,14 @@ static int aie2_init(struct amdxdna_dev *xdna) 
	if (!ndev->psp_hdl) {

		XDNA_ERR(xdna, "failed to create psp");

		ret = -ENOMEM;

		goto disable_sva;

		goto free_irq;

	}

	xdna->dev_handle = ndev;



	ret = aie2_hw_start(xdna);

	if (ret) {

		XDNA_ERR(xdna, "start npu failed, ret %d", ret);

		goto disable_sva;

		goto free_irq;

	}



	ret = aie2_mgmt_fw_query(ndev);
@@ -584,8 +578,6 @@ static int aie2_init(struct amdxdna_dev *xdna) 
	aie2_error_async_events_free(ndev);

stop_hw:

	aie2_hw_stop(xdna);

disable_sva:

	iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);

free_irq:

	pci_free_irq_vectors(pdev);

release_fw:
@@ -601,7 +593,6 @@ static void aie2_fini(struct amdxdna_dev *xdna) 


	aie2_hw_stop(xdna);

	aie2_error_async_events_free(ndev);

	iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);

	pci_free_irq_vectors(pdev);

}

drivers/dma/idxd/init.c

+6 −35
Original line number Diff line number Diff line
@@ -702,27 +702,6 @@ static void idxd_disable_system_pasid(struct idxd_device *idxd) 
	idxd->pasid = IOMMU_PASID_INVALID;

}



static int idxd_enable_sva(struct pci_dev *pdev)

{

	int ret;



	ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF);

	if (ret)

		return ret;



	ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);

	if (ret)

		iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF);



	return ret;

}



static void idxd_disable_sva(struct pci_dev *pdev)

{

	iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA);

	iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF);

}



static int idxd_probe(struct idxd_device *idxd)

{

	struct pci_dev *pdev = idxd->pdev;
@@ -737,9 +716,6 @@ static int idxd_probe(struct idxd_device *idxd) 
	dev_dbg(dev, "IDXD reset complete\n");



	if (IS_ENABLED(CONFIG_INTEL_IDXD_SVM) && sva) {

		if (idxd_enable_sva(pdev)) {

			dev_warn(dev, "Unable to turn on user SVA feature.\n");

		} else {

		set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags);



		rc = idxd_enable_system_pasid(idxd);
@@ -747,7 +723,6 @@ static int idxd_probe(struct idxd_device *idxd) 
			dev_warn(dev, "No in-kernel DMA with PASID. %d\n", rc);

		else

			set_bit(IDXD_FLAG_PASID_ENABLED, &idxd->flags);

		}

	} else if (!sva) {

		dev_warn(dev, "User forced SVA off via module param.\n");

	}
@@ -785,8 +760,6 @@ static int idxd_probe(struct idxd_device *idxd) 
 err:

	if (device_pasid_enabled(idxd))

		idxd_disable_system_pasid(idxd);

	if (device_user_pasid_enabled(idxd))

		idxd_disable_sva(pdev);

	return rc;

}
@@ -797,8 +770,6 @@ static void idxd_cleanup(struct idxd_device *idxd) 
	idxd_cleanup_internals(idxd);

	if (device_pasid_enabled(idxd))

		idxd_disable_system_pasid(idxd);

	if (device_user_pasid_enabled(idxd))

		idxd_disable_sva(idxd->pdev);

}



/*

drivers/iommu/Kconfig

+1 −157
Original line number Diff line number Diff line
@@ -192,6 +192,7 @@ config MSM_IOMMU 
	  If unsure, say N here.



source "drivers/iommu/amd/Kconfig"

source "drivers/iommu/arm/Kconfig"

source "drivers/iommu/intel/Kconfig"

source "drivers/iommu/iommufd/Kconfig"

source "drivers/iommu/riscv/Kconfig"
@@ -199,7 +200,6 @@ source "drivers/iommu/riscv/Kconfig" 
config IRQ_REMAP

	bool "Support for Interrupt Remapping"

	depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI

	select DMAR_TABLE if INTEL_IOMMU

	help

	  Supports Interrupt remapping for IO-APIC and MSI devices.

	  To use x2apic mode in the CPU's which support x2APIC enhancements or
@@ -314,150 +314,6 @@ config APPLE_DART 


	  Say Y here if you are using an Apple SoC.



# ARM IOMMU support

config ARM_SMMU

	tristate "ARM Ltd. System MMU (SMMU) Support"

	depends on ARM64 || ARM || COMPILE_TEST

	depends on !GENERIC_ATOMIC64	# for IOMMU_IO_PGTABLE_LPAE

	select IOMMU_API

	select IOMMU_IO_PGTABLE_LPAE

	select ARM_DMA_USE_IOMMU if ARM

	help

	  Support for implementations of the ARM System MMU architecture

	  versions 1 and 2.



	  Say Y here if your SoC includes an IOMMU device implementing

	  the ARM SMMU architecture.



config ARM_SMMU_LEGACY_DT_BINDINGS

	bool "Support the legacy \"mmu-masters\" devicetree bindings"

	depends on ARM_SMMU=y && OF

	help

	  Support for the badly designed and deprecated "mmu-masters"

	  devicetree bindings. This allows some DMA masters to attach

	  to the SMMU but does not provide any support via the DMA API.

	  If you're lucky, you might be able to get VFIO up and running.



	  If you say Y here then you'll make me very sad. Instead, say N

	  and move your firmware to the utopian future that was 2016.



config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT

	bool "Default to disabling bypass on ARM SMMU v1 and v2"

	depends on ARM_SMMU

	default y

	help

	  Say Y here to (by default) disable bypass streams such that

	  incoming transactions from devices that are not attached to

	  an iommu domain will report an abort back to the device and

	  will not be allowed to pass through the SMMU.



	  Any old kernels that existed before this KConfig was

	  introduced would default to _allowing_ bypass (AKA the

	  equivalent of NO for this config).  However the default for

	  this option is YES because the old behavior is insecure.



	  There are few reasons to allow unmatched stream bypass, and

	  even fewer good ones.  If saying YES here breaks your board

	  you should work on fixing your board.  This KConfig option

	  is expected to be removed in the future and we'll simply

	  hardcode the bypass disable in the code.



	  NOTE: the kernel command line parameter

	  'arm-smmu.disable_bypass' will continue to override this

	  config.



config ARM_SMMU_MMU_500_CPRE_ERRATA

	bool "Enable errata workaround for CPRE in SMMU reset path"

	depends on ARM_SMMU

	default y

	help

	  Say Y here (by default) to apply workaround to disable

	  MMU-500's next-page prefetcher for sake of 4 known errata.



	  Say N here only when it is sure that any errata related to

	  prefetch enablement are not applicable on the platform.

	  Refer silicon-errata.rst for info on errata IDs.



config ARM_SMMU_QCOM

	def_tristate y

	depends on ARM_SMMU && ARCH_QCOM

	select QCOM_SCM

	help

	  When running on a Qualcomm platform that has the custom variant

	  of the ARM SMMU, this needs to be built into the SMMU driver.



config ARM_SMMU_QCOM_DEBUG

	bool "ARM SMMU QCOM implementation defined debug support"

	depends on ARM_SMMU_QCOM=y

	help

	  Support for implementation specific debug features in ARM SMMU

	  hardware found in QTI platforms. This include support for

	  the Translation Buffer Units (TBU) that can be used to obtain

	  additional information when debugging memory management issues

	  like context faults.



	  Say Y here to enable debug for issues such as context faults

	  or TLB sync timeouts which requires implementation defined

	  register dumps.



config ARM_SMMU_V3

	tristate "ARM Ltd. System MMU Version 3 (SMMUv3) Support"

	depends on ARM64

	select IOMMU_API

	select IOMMU_IO_PGTABLE_LPAE

	select GENERIC_MSI_IRQ

	select IOMMUFD_DRIVER if IOMMUFD

	help

	  Support for implementations of the ARM System MMU architecture

	  version 3 providing translation support to a PCIe root complex.



	  Say Y here if your system includes an IOMMU device implementing

	  the ARM SMMUv3 architecture.



if ARM_SMMU_V3

config ARM_SMMU_V3_SVA

	bool "Shared Virtual Addressing support for the ARM SMMUv3"

	select IOMMU_SVA

	select IOMMU_IOPF

	select MMU_NOTIFIER

	help

	  Support for sharing process address spaces with devices using the

	  SMMUv3.



	  Say Y here if your system supports SVA extensions such as PCIe PASID

	  and PRI.



config ARM_SMMU_V3_IOMMUFD

	bool "Enable IOMMUFD features for ARM SMMUv3 (EXPERIMENTAL)"

	depends on IOMMUFD

	help

	  Support for IOMMUFD features intended to support virtual machines

	  with accelerated virtual IOMMUs.



	  Say Y here if you are doing development and testing on this feature.



config ARM_SMMU_V3_KUNIT_TEST

	tristate "KUnit tests for arm-smmu-v3 driver"  if !KUNIT_ALL_TESTS

	depends on KUNIT

	depends on ARM_SMMU_V3_SVA

	default KUNIT_ALL_TESTS

	help

	  Enable this option to unit-test arm-smmu-v3 driver functions.



	  If unsure, say N.



config TEGRA241_CMDQV

	bool "NVIDIA Tegra241 CMDQ-V extension support for ARM SMMUv3"

	depends on ACPI

	help

	  Support for NVIDIA CMDQ-Virtualization extension for ARM SMMUv3. The

	  CMDQ-V extension is similar to v3.3 ECMDQ for multi command queues

	  support, except with virtualization capabilities.



	  Say Y here if your system is NVIDIA Tegra241 (Grace) or it has the same

	  CMDQ-V extension.

endif



config S390_IOMMU

	def_bool y if S390 && PCI

	depends on S390 && PCI
@@ -494,18 +350,6 @@ config MTK_IOMMU_V1 


	  if unsure, say N here.



config QCOM_IOMMU

	# Note: iommu drivers cannot (yet?) be built as modules

	bool "Qualcomm IOMMU Support"

	depends on ARCH_QCOM || COMPILE_TEST

	depends on !GENERIC_ATOMIC64	# for IOMMU_IO_PGTABLE_LPAE

	select QCOM_SCM

	select IOMMU_API

	select IOMMU_IO_PGTABLE_LPAE

	select ARM_DMA_USE_IOMMU

	help

	  Support for IOMMU on certain Qualcomm SoCs.



config HYPERV_IOMMU

	bool "Hyper-V IRQ Handling"

	depends on HYPERV && X86