Commit 896dd923 authored by Koji Matsuoka's avatar Koji Matsuoka Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a779a0: Add MSIOF device nodes



Add device nodes for the Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: default avatarKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210108104345.2026857-1-geert+renesas@glider.be
parent 1f4449e1
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+90 −0
Original line number Diff line number Diff line
@@ -264,6 +264,96 @@ scif0: serial@e6e60000 {
			status = "disabled";
		};

		msiof0: spi@e6e90000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6e90000 0 0x0064>;
			interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 618>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 618>;
			dmas = <&dmac1 0x41>, <&dmac1 0x40>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		msiof1: spi@e6ea0000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6ea0000 0 0x0064>;
			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 619>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 619>;
			dmas = <&dmac1 0x43>, <&dmac1 0x42>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		msiof2: spi@e6c00000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6c00000 0 0x0064>;
			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 620>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 620>;
			dmas = <&dmac1 0x45>, <&dmac1 0x44>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		msiof3: spi@e6c10000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6c10000 0 0x0064>;
			interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 621>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 621>;
			dmas = <&dmac1 0x47>, <&dmac1 0x46>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		msiof4: spi@e6c20000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6c20000 0 0x0064>;
			interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 622>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 622>;
			dmas = <&dmac1 0x49>, <&dmac1 0x48>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		msiof5: spi@e6c28000 {
			compatible = "renesas,msiof-r8a779a0",
				     "renesas,rcar-gen3-msiof";
			reg = <0 0xe6c28000 0 0x0064>;
			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 623>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 623>;
			dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		dmac1: dma-controller@e7350000 {
			compatible = "renesas,dmac-r8a779a0";
			reg = <0 0xe7350000 0 0x1000>,