Commit 8b0c59c6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U" 



This reverts commit 3d2d52a0, it caused
a build regression:

arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:109.4-14: Warning (reg_format): /switch/ports:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #address-cells value
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #size-cells value

Reported-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent d8db5d8a

arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts

+0 −77
Original line number Diff line number Diff line
@@ -93,83 +93,6 @@ led { 
			gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;

		};

	};



	switch {

		compatible = "realtek,rtl8365mb";

		/* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */

		mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;

		mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;

		reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;

		realtek,disable-leds;

		dsa,member = <1 0>;



		ports {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0>;



			port@0 {

				reg = <0>;

				label = "lan5";

				phy-handle = <&ethphy0>;

			};



			port@1 {

				reg = <1>;

				label = "lan6";

				phy-handle = <&ethphy1>;

			};



			port@2 {

				reg = <2>;

				label = "lan7";

				phy-handle = <&ethphy2>;

			};



			port@3 {

				reg = <3>;

				label = "lan8";

				phy-handle = <&ethphy3>;

			};



			port@6 {

				reg = <6>;

				label = "cpu";

				ethernet = <&sw0_p5>;

				phy-mode = "rgmii";

				tx-internal-delay-ps = <2000>;

				rx-internal-delay-ps = <2100>;



				fixed-link {

					speed = <1000>;

					full-duplex;

					pause;

				};

			};

		};



		mdio {

			compatible = "realtek,smi-mdio";

			#address-cells = <1>;

			#size-cells = <0>;



			ethphy0: ethernet-phy@0 {

				reg = <0>;

			};



			ethphy1: ethernet-phy@1 {

				reg = <1>;

			};



			ethphy2: ethernet-phy@2 {

				reg = <2>;

			};



			ethphy3: ethernet-phy@3 {

				reg = <3>;

			};

		};

	};

};



&srab {