Commit 8c214b78 authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
Browse files

arm64: dts: imx8mp-evk: correct I2C5 pad settings 



According to RM bit layout, BIT3 and BIT0 are reserved.
 8  7   6   5   4   3  2 1  0
PE HYS PUE ODE FSEL X  DSE  X

Although function is not broken, we should not set reserved bit.

Fixes: 8134822d ("arm64: dts: imx8mp-evk: add support for I2C5")
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarRasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 95587ecf

arch/arm64/boot/dts/freescale/imx8mp-evk.dts

+2 −2
Original line number Diff line number Diff line
@@ -481,8 +481,8 @@ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3 


	pinctrl_i2c5: i2c5grp {

		fsl,pins = <

			MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA         0x400001c3

			MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL         0x400001c3

			MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA         0x400001c2

			MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL         0x400001c2

		>;

	};