Commit 8e184ac0 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge tag 'amd-pstate-v6.11-2024-06-11' of... 

Merge tag 'amd-pstate-v6.11-2024-06-11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux

Merge amd-pstate driver updates for v6.11 from Mario Mario Limonciello:

"Add support for "Fast CPPC" which allows some CPUs to operate a tighter
 loop for passive mode."

* tag 'amd-pstate-v6.11-2024-06-11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux:
  cpufreq: amd-pstate: change cpu freq transition delay for some models
  x86/cpufeatures: Add AMD FAST CPPC feature flag
parents db404525 c00d476c

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -470,6 +470,7 @@ 
#define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* "" BHI_DIS_S HW control available */

#define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* "" BHI_DIS_S HW control enabled */

#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */

#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* "" AMD Fast CPPC */



/*

 * BUG word(s)

arch/x86/kernel/cpu/scattered.c

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { 
	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },

	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },

	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },

	{ X86_FEATURE_FAST_CPPC, 	CPUID_EDX, 15, 0x80000007, 0 },

	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },

	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },

	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },

drivers/cpufreq/amd-pstate.c

+7 −2
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ 


#define AMD_PSTATE_TRANSITION_LATENCY	20000

#define AMD_PSTATE_TRANSITION_DELAY	1000

#define AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY 600

#define CPPC_HIGHEST_PERF_PERFORMANCE	196

#define CPPC_HIGHEST_PERF_DEFAULT	166
@@ -849,8 +850,12 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) 
	u32 transition_delay_ns;



	transition_delay_ns = cppc_get_transition_latency(cpu);

	if (transition_delay_ns == CPUFREQ_ETERNAL)

	if (transition_delay_ns == CPUFREQ_ETERNAL) {

		if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC))

			return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY;

		else

			return AMD_PSTATE_TRANSITION_DELAY;

	}



	return transition_delay_ns / NSEC_PER_USEC;

}