Commit 93536c2b authored by Matt Roper's avatar Matt Roper Committed by Rodrigo Vivi
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drm/xe: Define interrupt vector bits with the interrupt registers



The bit definitions had become a bit orphaned; move them to the same
location as the interrupt registers that they're used with.

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20231214184659.2249559-16-matthew.d.roper@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 48e70d2a
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+5 −0
Original line number Diff line number Diff line
@@ -456,6 +456,11 @@
#define XEHPC_BCS3_BCS4_INTR_MASK		XE_REG(0x190114)
#define XEHPC_BCS5_BCS6_INTR_MASK		XE_REG(0x190118)
#define XEHPC_BCS7_BCS8_INTR_MASK		XE_REG(0x19011c)
#define   GT_WAIT_SEMAPHORE_INTERRUPT		REG_BIT(11)
#define   GT_CONTEXT_SWITCH_INTERRUPT		REG_BIT(8)
#define   GT_RENDER_PIPECTL_NOTIFY_INTERRUPT	REG_BIT(4)
#define   GT_CS_MASTER_ERROR_INTERRUPT		REG_BIT(3)
#define   GT_RENDER_USER_INTERRUPT		REG_BIT(0)

#define PVC_GT0_PACKAGE_ENERGY_STATUS		XE_REG(0x281004)
#define PVC_GT0_PACKAGE_RAPL_LIMIT		XE_REG(0x281008)
+0 −6
Original line number Diff line number Diff line
@@ -7,12 +7,6 @@

#include "regs/xe_reg_defs.h"

#define   GT_WAIT_SEMAPHORE_INTERRUPT		REG_BIT(11)
#define   GT_CONTEXT_SWITCH_INTERRUPT		REG_BIT(8)
#define   GT_RENDER_PIPECTL_NOTIFY_INTERRUPT	REG_BIT(4)
#define   GT_CS_MASTER_ERROR_INTERRUPT		REG_BIT(3)
#define   GT_RENDER_USER_INTERRUPT		REG_BIT(0)

#define TIMESTAMP_OVERRIDE					XE_REG(0x44074)
#define   TIMESTAMP_OVERRIDE_US_COUNTER_DENOMINATOR_MASK	REG_GENMASK(15, 12)
#define   TIMESTAMP_OVERRIDE_US_COUNTER_DIVIDER_MASK		REG_GENMASK(9, 0)
+0 −1
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@

#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
#include "regs/xe_regs.h"
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_device.h"