Commit 93a610c0 authored by SkyLake.Huang's avatar SkyLake.Huang Committed by Andrew Lunn
Browse files

net: phy: mediatek-ge-soc: Propagate error code correctly in cal_cycle() 



This patch propagates error code correctly in cal_cycle()
and improve with FIELD_GET().

Signed-off-by: default avatarSkyLake.Huang <skylake.huang@mediatek.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
parent b0f90a86

drivers/net/phy/mediatek-ge-soc.c

+5 −3
Original line number Diff line number Diff line
@@ -110,7 +110,7 @@ 
#define   MTK_PHY_CR_TX_AMP_OFFSET_D_MASK	GENMASK(6, 0)



#define MTK_PHY_RG_AD_CAL_COMP			0x17a

#define   MTK_PHY_AD_CAL_COMP_OUT_SHIFT		(8)

#define   MTK_PHY_AD_CAL_COMP_OUT_MASK		GENMASK(8, 8)



#define MTK_PHY_RG_AD_CAL_CLK			0x17b

#define   MTK_PHY_DA_CAL_CLK			BIT(0)
@@ -351,8 +351,10 @@ static int cal_cycle(struct phy_device *phydev, int devad, 


	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN,

			   MTK_PHY_DA_CALIN_FLAG);

	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >>

			   MTK_PHY_AD_CAL_COMP_OUT_SHIFT;

	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP);

	if (ret < 0)

		return ret;

	ret = FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret);

	phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret);



	return ret;