Commit 952cf093 authored by Bartosz Golaszewski's avatar Bartosz Golaszewski
Browse files

gpio: aspeed-sgpio: use lock guards 

Reduce the code complexity by using automatic lock guards with the raw
spinlock.

Link: https://lore.kernel.org/r/20250303-gpiochip-set-conversion-v1-14-1d5cceeebf8b@linaro.org


Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent c72e61b5

drivers/gpio/gpio-aspeed-sgpio.c

+31 −49
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 */



#include <linux/bitfield.h>

#include <linux/cleanup.h>

#include <linux/clk.h>

#include <linux/gpio/driver.h>

#include <linux/hashtable.h>
@@ -170,17 +171,14 @@ static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset) 
{

	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);

	const struct aspeed_sgpio_bank *bank = to_bank(offset);

	unsigned long flags;

	enum aspeed_sgpio_reg reg;

	int rc = 0;



	raw_spin_lock_irqsave(&gpio->lock, flags);

	guard(raw_spinlock_irqsave)(&gpio->lock);



	reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;

	rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));



	raw_spin_unlock_irqrestore(&gpio->lock, flags);



	return rc;

}
@@ -214,13 +212,10 @@ static int sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val) 
static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)

{

	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);

	unsigned long flags;



	raw_spin_lock_irqsave(&gpio->lock, flags);

	guard(raw_spinlock_irqsave)(&gpio->lock);



	sgpio_set_value(gc, offset, val);



	raw_spin_unlock_irqrestore(&gpio->lock, flags);

}



static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
@@ -231,15 +226,14 @@ static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset) 
static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)

{

	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);

	unsigned long flags;

	int rc;



	/* No special action is required for setting the direction; we'll

	 * error-out in sgpio_set_value if this isn't an output GPIO */



	raw_spin_lock_irqsave(&gpio->lock, flags);

	guard(raw_spinlock_irqsave)(&gpio->lock);



	rc = sgpio_set_value(gc, offset, val);

	raw_spin_unlock_irqrestore(&gpio->lock, flags);



	return rc;

}
@@ -269,7 +263,6 @@ static void aspeed_sgpio_irq_ack(struct irq_data *d) 
{

	const struct aspeed_sgpio_bank *bank;

	struct aspeed_sgpio *gpio;

	unsigned long flags;

	void __iomem *status_addr;

	int offset;

	u32 bit;
@@ -278,18 +271,15 @@ static void aspeed_sgpio_irq_ack(struct irq_data *d) 


	status_addr = bank_reg(gpio, bank, reg_irq_status);



	raw_spin_lock_irqsave(&gpio->lock, flags);

	guard(raw_spinlock_irqsave)(&gpio->lock);



	iowrite32(bit, status_addr);



	raw_spin_unlock_irqrestore(&gpio->lock, flags);

}



static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)

{

	const struct aspeed_sgpio_bank *bank;

	struct aspeed_sgpio *gpio;

	unsigned long flags;

	u32 reg, bit;

	void __iomem *addr;

	int offset;
@@ -301,8 +291,7 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set) 
	if (set)

		gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d));



	raw_spin_lock_irqsave(&gpio->lock, flags);



	scoped_guard(raw_spinlock_irqsave, &gpio->lock) {

		reg = ioread32(addr);

		if (set)

			reg |= bit;
@@ -310,8 +299,7 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set) 
			reg &= ~bit;



		iowrite32(reg, addr);



	raw_spin_unlock_irqrestore(&gpio->lock, flags);

	}



	/* Masking the IRQ */

	if (!set)
@@ -339,7 +327,6 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type) 
	const struct aspeed_sgpio_bank *bank;

	irq_flow_handler_t handler;

	struct aspeed_sgpio *gpio;

	unsigned long flags;

	void __iomem *addr;

	int offset;
@@ -366,8 +353,7 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type) 
		return -EINVAL;

	}



	raw_spin_lock_irqsave(&gpio->lock, flags);



	scoped_guard(raw_spinlock_irqsave, &gpio->lock) {

		addr = bank_reg(gpio, bank, reg_irq_type0);

		reg = ioread32(addr);

		reg = (reg & ~bit) | type0;
@@ -382,8 +368,7 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type) 
		reg = ioread32(addr);

		reg = (reg & ~bit) | type2;

		iowrite32(reg, addr);



	raw_spin_unlock_irqrestore(&gpio->lock, flags);

	}



	irq_set_handler_locked(d, handler);
@@ -487,13 +472,12 @@ static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip, 
					unsigned int offset, bool enable)

{

	struct aspeed_sgpio *gpio = gpiochip_get_data(chip);

	unsigned long flags;

	void __iomem *reg;

	u32 val;



	reg = bank_reg(gpio, to_bank(offset), reg_tolerance);



	raw_spin_lock_irqsave(&gpio->lock, flags);

	guard(raw_spinlock_irqsave)(&gpio->lock);



	val = readl(reg);
@@ -504,8 +488,6 @@ static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip, 


	writel(val, reg);



	raw_spin_unlock_irqrestore(&gpio->lock, flags);



	return 0;

}