Unverified Commit 9546f004 authored by Samuel Holland's avatar Samuel Holland Committed by Palmer Dabbelt
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riscv: Only send remote fences when some other CPU is online 



If no other CPU is online, a local cache or TLB flush is sufficient.
These checks can be constant-folded when SMP is disabled.

Signed-off-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20240327045035.368512-6-samuel.holland@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 038ac18a

arch/riscv/mm/cacheflush.c

+3 −1
Original line number Diff line number Diff line
@@ -21,7 +21,9 @@ void flush_icache_all(void) 
{

	local_flush_icache_all();



	if (riscv_use_sbi_for_rfence())

	if (num_online_cpus() < 2)

		return;

	else if (riscv_use_sbi_for_rfence())

		sbi_remote_fence_i(NULL);

	else

		on_each_cpu(ipi_remote_fence_i, NULL, 1);

arch/riscv/mm/tlbflush.c

+3 −1
Original line number Diff line number Diff line
@@ -79,7 +79,9 @@ static void __ipi_flush_tlb_all(void *info) 


void flush_tlb_all(void)

{

	if (riscv_use_sbi_for_rfence())

	if (num_online_cpus() < 2)

		local_flush_tlb_all();

	else if (riscv_use_sbi_for_rfence())

		sbi_remote_sfence_vma_asid(NULL, 0, FLUSH_TLB_MAX_SIZE, FLUSH_TLB_NO_ASID);

	else

		on_each_cpu(__ipi_flush_tlb_all, NULL, 1);