Commit 95cb8ff6 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Bjorn Helgaas
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PCI: Add PCIE_MSG_CODE_ASSERT_INTx message macros

Add "Message Routing" and "INTx Mechanism Messages" macros to enable
a PCIe driver to send messages for INTx Interrupt Signaling.

Values from PCIe r6.1, sec 2.2.8 and 2.2.8.1.

Link: https://lore.kernel.org/linux-pci/20240418-pme_msg-v8-1-a54265c39742@nxp.com


Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
parent cd02e4b6
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+18 −0
Original line number Diff line number Diff line
@@ -22,6 +22,24 @@
 */
#define PCIE_PME_TO_L2_TIMEOUT_US	10000

/* Message Routing (r[2:0]); PCIe r6.0, sec 2.2.8 */
#define PCIE_MSG_TYPE_R_RC	0
#define PCIE_MSG_TYPE_R_ADDR	1
#define PCIE_MSG_TYPE_R_ID	2
#define PCIE_MSG_TYPE_R_BC	3
#define PCIE_MSG_TYPE_R_LOCAL	4
#define PCIE_MSG_TYPE_R_GATHER	5

/* INTx Mechanism Messages; PCIe r6.0, sec 2.2.8.1 */
#define PCIE_MSG_CODE_ASSERT_INTA	0x20
#define PCIE_MSG_CODE_ASSERT_INTB	0x21
#define PCIE_MSG_CODE_ASSERT_INTC	0x22
#define PCIE_MSG_CODE_ASSERT_INTD	0x23
#define PCIE_MSG_CODE_DEASSERT_INTA	0x24
#define PCIE_MSG_CODE_DEASSERT_INTB	0x25
#define PCIE_MSG_CODE_DEASSERT_INTC	0x26
#define PCIE_MSG_CODE_DEASSERT_INTD	0x27

extern const unsigned char pcie_link_speed[];
extern bool pci_early_dump;