Commit 98471006 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amd/display: add clear_tiling mi callbacks 



This adds clear_tiling callbacks to the mi structure that
will be used for drm panic support to clear the tiling on
a display.  Mem input (mi) is used on DCE based display
IPs.

Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: Lu Yao <yaolu@kylinos.cn>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Cc: Harry Wentland <harry.wentland@amd.com>
parent 1fa5c5a3

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

+29 −5
Original line number Diff line number Diff line
@@ -481,7 +481,6 @@ static void program_tiling( 
	}

}





static void program_size_and_rotation(

	struct dce_mem_input *dce_mi,

	enum dc_rotation_angle rotation,
@@ -627,6 +626,27 @@ static void program_grph_pixel_format( 
			GRPH_PRESCALE_B_SIGN, sign);

}



static void dce_mi_clear_tiling(

	struct mem_input *mi)

{

	struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mi);



	if (dce_mi->masks->GRPH_SW_MODE) { /* GFX9 */

		REG_UPDATE(GRPH_CONTROL,

			   GRPH_SW_MODE, DC_SW_LINEAR);

	}



	if (dce_mi->masks->GRPH_MICRO_TILE_MODE) { /* GFX8 */

		REG_UPDATE(GRPH_CONTROL,

			   GRPH_ARRAY_MODE, DC_SW_LINEAR);

	}



	if (dce_mi->masks->GRPH_ARRAY_MODE) { /* GFX6 but reuses gfx8 struct */

		REG_UPDATE(GRPH_CONTROL,

			   GRPH_ARRAY_MODE, DC_SW_LINEAR);

	}

}



static void dce_mi_program_surface_config(

	struct mem_input *mi,

	enum surface_pixel_format format,
@@ -884,7 +904,8 @@ static const struct mem_input_funcs dce_mi_funcs = { 
	.mem_input_program_pte_vm = dce_mi_program_pte_vm,

	.mem_input_program_surface_config =

			dce_mi_program_surface_config,

	.mem_input_is_flip_pending = dce_mi_is_flip_pending

	.mem_input_is_flip_pending = dce_mi_is_flip_pending,

	.mem_input_clear_tiling = dce_mi_clear_tiling,

};



#if defined(CONFIG_DRM_AMD_DC_SI)
@@ -897,7 +918,8 @@ static const struct mem_input_funcs dce60_mi_funcs = { 
	.mem_input_program_pte_vm = dce_mi_program_pte_vm,

	.mem_input_program_surface_config =

			dce60_mi_program_surface_config,

	.mem_input_is_flip_pending = dce_mi_is_flip_pending

	.mem_input_is_flip_pending = dce_mi_is_flip_pending,

	.mem_input_clear_tiling = dce_mi_clear_tiling,

};

#endif
@@ -910,7 +932,8 @@ static const struct mem_input_funcs dce112_mi_funcs = { 
	.mem_input_program_pte_vm = dce_mi_program_pte_vm,

	.mem_input_program_surface_config =

			dce_mi_program_surface_config,

	.mem_input_is_flip_pending = dce_mi_is_flip_pending

	.mem_input_is_flip_pending = dce_mi_is_flip_pending,

	.mem_input_clear_tiling = dce_mi_clear_tiling,

};



static const struct mem_input_funcs dce120_mi_funcs = {
@@ -922,7 +945,8 @@ static const struct mem_input_funcs dce120_mi_funcs = { 
	.mem_input_program_pte_vm = dce_mi_program_pte_vm,

	.mem_input_program_surface_config =

			dce_mi_program_surface_config,

	.mem_input_is_flip_pending = dce_mi_is_flip_pending

	.mem_input_is_flip_pending = dce_mi_is_flip_pending,

	.mem_input_clear_tiling = dce_mi_clear_tiling,

};



void dce_mem_input_construct(

drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h

+2 −0
Original line number Diff line number Diff line
@@ -187,6 +187,8 @@ struct mem_input_funcs { 
			const struct dc_cursor_position *pos,

			const struct dc_cursor_mi_param *param);



	void (*mem_input_clear_tiling)(

		struct mem_input *mem_input);

};



#endif