Commit 9d245214 authored by Biju Das's avatar Biju Das Committed by Thomas Gleixner
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dt-bindings: interrupt-controller: renesas,rzv2h-icu: Document RZ/G3E SoC 



Document RZ/G3E (R9A09G047) ICU bindings. The ICU block on the RZ/G3E
SoC is almost identical to the one found on the RZ/V2H SoC, with the
following differences:
 - The TINT register base offset is 0x800 instead of zero.
 - The number of supported GPIO interrupts for TINT selection is 141
   instead of 86.
 - The pin index and TINT selection index are not in the 1:1 map
 - The number of TSSR registers is 16 instead of 8
 - Each TSSR register can program 2 TINTs instead of 4 TINTs

Hence add the new compatible string "renesas,r9a09g047-icu" for RZ/G3E SoC.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: default avatarTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/all/20250224131253.134199-2-biju.das.jz@bp.renesas.com
parent 0edaa459

Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml

+4 −2
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 
$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas RZ/V2H(P) Interrupt Control Unit

title: Renesas RZ/{G3E,V2H(P)} Interrupt Control Unit



maintainers:

  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
@@ -20,7 +20,9 @@ description: 


properties:

  compatible:

    const: renesas,r9a09g057-icu # RZ/V2H(P)

    enum:

      - renesas,r9a09g047-icu # RZ/G3E

      - renesas,r9a09g057-icu # RZ/V2H(P)



  '#interrupt-cells':

    description: The first cell is the SPI number of the NMI or the