Commit a2b88026 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-kunit', 'clk-mediatek', 'clk-cleanup' and 'clk-bindings' into clk-next 

 - KUnit tests for clk registration and fixed rate basic clk type

* clk-kunit:
  clk: Add KUnit tests for clks registered with struct clk_parent_data
  clk: Add KUnit tests for clk fixed rate basic type
  clk: Add test managed clk provider/consumer APIs
  platform: Add test managed platform_device/driver APIs
  of: Add a KUnit test for overlays and test managed APIs
  dt-bindings: vendor-prefixes: Add "test" vendor for KUnit and friends
  of: Add test managed wrappers for of_overlay_apply()/of_node_put()
  of/platform: Allow overlays to create platform devices from the root node

* clk-mediatek:
  dt-bindings: clock: mediatek: Convert MediaTek clock syscons to schema
  dt-bindings: Move Mediatek clock controllers to "clock" directory
  dt-bindings: clock: mediatek,apmixedsys: Fix "mediatek,mt6779-apmixed" compatible
  clk: mediatek: reset: Remove unused mtk_register_reset_controller()
  clk: mediatek: reset: Return regmap's error code

* clk-cleanup:
  clk: starfive: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
  clk: ti: dra7-atl: Fix leak of of_nodes
  clk:davinci: make use of dev_err_cast_probe()
  clk: bcm: bcm53573: fix OF node leak in init
  clk: lmk04832: Use devm_clk_get_enabled() helpers
  clk: visconti: Switch to use kmemdup_array()
  clk: mmp: Switch to use kmemdup_array()
  clk: hisilicon: Remove unnecessary local variable
  clk: use clk_core_unlink_consumer() helper
  clk: Use of_property_present()
  clk: at91: Use of_property_count_u32_elems() to get property length
  da8xx-cfgchip.c: replace of_node_put with __free improves cleanup

* clk-bindings:
  dt-bindings: clock: st,stm32mp1-rcc: add top-level constraints
  dt-bindings: clock: cirrus,lochnagar: add top-level constraints
  dt-bindings: clock: baikal,bt1-ccu-div: add top-level constraints
  dt-bindings: clock: nxp,lpc3220-usb-clk: Convert bindings to dtschema
  dt-bindings: clock: nxp,lpc3220-clk: Convert bindings to DT schema
parents 274aff87 cd86437c 55c312c1 4844ab3f

Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt

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Mediatek bdpsys controller

============================



The Mediatek bdpsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt2701-bdpsys", "syscon"

	- "mediatek,mt2712-bdpsys", "syscon"

	- "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon"

- #clock-cells: Must be 1



The bdpsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



bdpsys: clock-controller@1c000000 {

	compatible = "mediatek,mt2701-bdpsys", "syscon";

	reg = <0 0x1c000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt

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MediaTek CAMSYS controller

============================



The MediaTek camsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt6765-camsys", "syscon"

	- "mediatek,mt6779-camsys", "syscon"

	- "mediatek,mt8183-camsys", "syscon"

- #clock-cells: Must be 1



The camsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



camsys: camsys@1a000000  {

	compatible = "mediatek,mt8183-camsys", "syscon";

	reg = <0 0x1a000000  0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt

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Mediatek imgsys controller

============================



The Mediatek imgsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt2712-imgsys", "syscon"

	- "mediatek,mt6765-imgsys", "syscon"

	- "mediatek,mt6779-imgsys", "syscon"

	- "mediatek,mt6797-imgsys", "syscon"

	- "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt8167-imgsys", "syscon"

	- "mediatek,mt8173-imgsys", "syscon"

	- "mediatek,mt8183-imgsys", "syscon"

- #clock-cells: Must be 1



The imgsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



imgsys: clock-controller@15000000 {

	compatible = "mediatek,mt8173-imgsys", "syscon";

	reg = <0 0x15000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt

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Mediatek ipesys controller

============================



The Mediatek ipesys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt6779-ipesys", "syscon"

- #clock-cells: Must be 1



The ipesys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



ipesys: clock-controller@1b000000 {

	compatible = "mediatek,mt6779-ipesys", "syscon";

	reg = <0 0x1b000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt

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Mediatek IPU controller

============================



The Mediatek ipu controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt8183-ipu_conn", "syscon"

	- "mediatek,mt8183-ipu_adl", "syscon"

	- "mediatek,mt8183-ipu_core0", "syscon"

	- "mediatek,mt8183-ipu_core1", "syscon"

- #clock-cells: Must be 1



The ipu controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



ipu_conn: syscon@19000000 {

	compatible = "mediatek,mt8183-ipu_conn", "syscon";

	reg = <0 0x19000000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_adl: syscon@19010000 {

	compatible = "mediatek,mt8183-ipu_adl", "syscon";

	reg = <0 0x19010000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_core0: syscon@19180000 {

	compatible = "mediatek,mt8183-ipu_core0", "syscon";

	reg = <0 0x19180000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_core1: syscon@19280000 {

	compatible = "mediatek,mt8183-ipu_core1", "syscon";

	reg = <0 0x19280000 0 0x1000>;

	#clock-cells = <1>;

};