Commit a6166a4d authored by Chen Wang's avatar Chen Wang Committed by Philipp Zabel
Browse files

reset: simple: add support for Sophgo SG2042

parent 41197eb5
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ config RESET_SCMI

config RESET_SIMPLE
	bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
	default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
	default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
	depends on HAS_IOMEM
	help
	  This enables a simple reset controller driver for reset lines that
@@ -228,6 +228,7 @@ config RESET_SIMPLE
	   - RCC reset controller in STM32 MCUs
	   - Allwinner SoCs
	   - SiFive FU740 SoCs
	   - Sophgo SoCs

config RESET_SOCFPGA
	bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
+2 −0
Original line number Diff line number Diff line
@@ -151,6 +151,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
	{ .compatible = "snps,dw-high-reset" },
	{ .compatible = "snps,dw-low-reset",
		.data = &reset_simple_active_low },
	{ .compatible = "sophgo,sg2042-reset",
		.data = &reset_simple_active_low },
	{ /* sentinel */ },
};