Commit a6a4dd51 authored by Lang Yu's avatar Lang Yu Committed by Alex Deucher
Browse files

drm/amdgpu: Use AMDGPU_MQD_SIZE_ALIGN in KGD 



Use AMDGPU_MQD_SIZE_ALIGN for both kernel and user queue.

Signed-off-by: default avatarLang Yu <lang.yu@amd.com>
Reviewed-by: default avatarDavid Belanger <david.belanger@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarMukul Joshi <mukul.joshi@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0d9a49a2

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+10 −8
Original line number Diff line number Diff line
@@ -385,6 +385,8 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, 
	struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];

	struct amdgpu_ring *ring = &kiq->ring;

	u32 domain = AMDGPU_GEM_DOMAIN_GTT;

	u32 gfx_mqd_size = max(adev->mqds[AMDGPU_HW_IP_GFX].mqd_size, mqd_size);

	u32 compute_mqd_size = max(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size, mqd_size);



#if !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)

	/* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
@@ -424,17 +426,17 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, 
		for (i = 0; i < adev->gfx.num_gfx_rings; i++) {

			ring = &adev->gfx.gfx_ring[i];

			if (!ring->mqd_obj) {

				r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,

							    domain, &ring->mqd_obj,

				r = amdgpu_bo_create_kernel(adev, AMDGPU_MQD_SIZE_ALIGN(gfx_mqd_size),

								PAGE_SIZE, domain, &ring->mqd_obj,

							    &ring->mqd_gpu_addr, &ring->mqd_ptr);

				if (r) {

					dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);

					return r;

				}



				ring->mqd_size = mqd_size;

				ring->mqd_size = gfx_mqd_size;

				/* prepare MQD backup */

				adev->gfx.me.mqd_backup[i] = kzalloc(mqd_size, GFP_KERNEL);

				adev->gfx.me.mqd_backup[i] = kzalloc(gfx_mqd_size, GFP_KERNEL);

				if (!adev->gfx.me.mqd_backup[i]) {

					dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);

					return -ENOMEM;
@@ -448,17 +450,17 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, 
		j = i + xcc_id * adev->gfx.num_compute_rings;

		ring = &adev->gfx.compute_ring[j];

		if (!ring->mqd_obj) {

			r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,

						    domain, &ring->mqd_obj,

			r = amdgpu_bo_create_kernel(adev, AMDGPU_MQD_SIZE_ALIGN(compute_mqd_size),

							PAGE_SIZE, domain, &ring->mqd_obj,

						    &ring->mqd_gpu_addr, &ring->mqd_ptr);

			if (r) {

				dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);

				return r;

			}



			ring->mqd_size = mqd_size;

			ring->mqd_size = compute_mqd_size;

			/* prepare MQD backup */

			adev->gfx.mec.mqd_backup[j] = kzalloc(mqd_size, GFP_KERNEL);

			adev->gfx.mec.mqd_backup[j] = kzalloc(compute_mqd_size, GFP_KERNEL);

			if (!adev->gfx.mec.mqd_backup[j]) {

				dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);

				return -ENOMEM;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

+1 −1
Original line number Diff line number Diff line
@@ -2236,7 +2236,7 @@ static int gfx_v12_1_compute_mqd_init(struct amdgpu_device *adev, void *m, 
	mqd->cp_hqd_queue_priority = prop->hqd_queue_priority;



	mqd->cp_mqd_stride_size = prop->mqd_stride_size ? prop->mqd_stride_size :

		sizeof(struct v12_1_compute_mqd);

		AMDGPU_MQD_SIZE_ALIGN(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size);



	mqd->cp_hqd_active = prop->hqd_active;

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

+2 −1
Original line number Diff line number Diff line
@@ -289,7 +289,8 @@ static int mes_userq_mqd_create(struct amdgpu_usermode_queue *queue, 
		return -ENOMEM;

	}



	r = amdgpu_userq_create_object(uq_mgr, &queue->mqd, mqd_hw_default->mqd_size);

	r = amdgpu_userq_create_object(uq_mgr, &queue->mqd,

			AMDGPU_MQD_SIZE_ALIGN(mqd_hw_default->mqd_size));

	if (r) {

		DRM_ERROR("Failed to create MQD object for userqueue\n");

		goto free_props;