Commit a6ff0d85 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V fixes from Paul Walmsley:

 - Correct the MIPS RISC-V/JEDEC vendor ID

 - Fix the system shutdown behavior in the legacy case where
   CONFIG_RISCV_SBI_V01 is set, but the firmware implementation
   doesn't support the older v0.1 system shutdown method

 - Align some tools/ macro definitions with the corresponding
   kernel headers

* tag 'riscv-for-linus-6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  tools: riscv: Fixed misalignment of CSR related definitions
  riscv: sbi: Prefer SRST shutdown over legacy
  riscv: Update MIPS vendor id to 0x127
parents 5703357e e2cb6926

arch/riscv/include/asm/vendorid_list.h

+1 −1
Original line number Diff line number Diff line
@@ -7,8 +7,8 @@ 


#define ANDES_VENDOR_ID		0x31e

#define MICROCHIP_VENDOR_ID	0x029

#define MIPS_VENDOR_ID		0x127

#define SIFIVE_VENDOR_ID	0x489

#define THEAD_VENDOR_ID		0x5b7

#define MIPS_VENDOR_ID		0x722



#endif

arch/riscv/kernel/sbi.c

+5 −1
Original line number Diff line number Diff line
@@ -648,9 +648,9 @@ int sbi_debug_console_read(char *bytes, unsigned int num_bytes) 


void __init sbi_init(void)

{

	bool srst_power_off = false;

	int ret;



	sbi_set_power_off();

	ret = sbi_get_spec_version();

	if (ret > 0)

		sbi_spec_version = ret;
@@ -683,6 +683,7 @@ void __init sbi_init(void) 
		    sbi_probe_extension(SBI_EXT_SRST)) {

			pr_info("SBI SRST extension detected\n");

			register_platform_power_off(sbi_srst_power_off);

			srst_power_off = true;

			sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;

			sbi_srst_reboot_nb.priority = 192;

			register_restart_handler(&sbi_srst_reboot_nb);
@@ -702,4 +703,7 @@ void __init sbi_init(void) 
		__sbi_send_ipi	= __sbi_send_ipi_v01;

		__sbi_rfence	= __sbi_rfence_v01;

	}



	if (!srst_power_off)

		sbi_set_power_off();

}

drivers/perf/riscv_pmu_sbi.c

+1 −1
Original line number Diff line number Diff line
@@ -1109,7 +1109,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev) 
			/* compute hardware counter index */

			hidx = info->csr - CSR_CYCLE;



		/* check if the corresponding bit is set in sscountovf or overflow mask in shmem */

		/* check if the corresponding bit is set in scountovf or overflow mask in shmem */

		if (!(overflow & BIT(hidx)))

			continue;

tools/arch/riscv/include/asm/csr.h

+3 −2
Original line number Diff line number Diff line
@@ -167,7 +167,8 @@ 
#define VSIP_TO_HVIP_SHIFT	(IRQ_VS_SOFT - IRQ_S_SOFT)

#define VSIP_VALID_MASK		((_AC(1, UL) << IRQ_S_SOFT) | \

				 (_AC(1, UL) << IRQ_S_TIMER) | \

				 (_AC(1, UL) << IRQ_S_EXT))

				 (_AC(1, UL) << IRQ_S_EXT) | \

				 (_AC(1, UL) << IRQ_PMU_OVF))



/* AIA CSR bits */

#define TOPI_IID_SHIFT		16
@@ -280,7 +281,7 @@ 
#define CSR_HPMCOUNTER30H	0xc9e

#define CSR_HPMCOUNTER31H	0xc9f



#define CSR_SSCOUNTOVF		0xda0

#define CSR_SCOUNTOVF		0xda0



#define CSR_SSTATUS		0x100

#define CSR_SIE			0x104