Commit a7ed3a11 authored by Prajna Rajendra Kumar's avatar Prajna Rajendra Kumar Committed by Mark Brown
Browse files

spi: spi-microchip-core: Fix the number of chip selects supported 



The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.

Fixes: 9ac8d176 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: default avatarPrajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3b4c0fbc

drivers/spi/spi-microchip-core.c

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
#include <linux/spi/spi.h>



#define MAX_LEN				(0xffff)

#define MAX_CS				(8)

#define MAX_CS				(1)

#define DEFAULT_FRAMESIZE		(8)

#define FIFO_DEPTH			(32)

#define CLK_GEN_MODE1_MAX		(255)