Unverified Commit a886baaa authored by Cosmin Tanislav's avatar Cosmin Tanislav Committed by Mark Brown
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spi: rzv2h-rspi: set TX FIFO threshold to 0 



In PIO mode we send data word-by-word, and wait for the received data
to be available after each sent word, making no use of the TX interrupt.

In DMA mode, we need to set the RX and TX FIFO thresholds to 0, as
described in the User Manual.

In preparation for implementing DMA support, set TX FIFO threshold to 0,
as RX FIFO threshold is already 0.

Signed-off-by: default avatarCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Link: https://patch.msgid.link/20251201134229.600817-8-cosmin-gabriel.tanislav.xa@renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 6f9026b5

drivers/spi/spi-rzv2h-rspi.c

+1 −1
Original line number Diff line number Diff line
@@ -501,7 +501,7 @@ static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr, 
		writeb(0, rspi->base + RSPI_SSLP);



	/* Setup FIFO thresholds */

	conf16 = FIELD_PREP(RSPI_SPDCR2_TTRG, rspi->info->fifo_size - 1);

	conf16 = FIELD_PREP(RSPI_SPDCR2_TTRG, 0);

	conf16 |= FIELD_PREP(RSPI_SPDCR2_RTRG, 0);

	writew(conf16, rspi->base + RSPI_SPDCR2);