Commit ac9984ce authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx11: properly reference EOP interrupts for userqs 



Regardless of whether we disable kernel queues, we need
to take an extra reference to the pipe interrupts for
user queues to make sure they stay enabled in case we
disable them for kernel queues.

Reviewed-by: default avatarSunil Khatri <sunil.khatri@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6b9d2608

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+6 −3
Original line number Diff line number Diff line
@@ -4832,10 +4832,10 @@ static int gfx_v11_0_hw_init(struct amdgpu_ip_block *ip_block) 
static int gfx_v11_0_set_userq_eop_interrupts(struct amdgpu_device *adev,

					      bool enable)

{

	if (adev->gfx.disable_kq) {

	unsigned int irq_type;

	int m, p, r;



	if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) {

		for (m = 0; m < adev->gfx.me.num_me; m++) {

			for (p = 0; p < adev->gfx.me.num_pipe_per_me; p++) {

				irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p;
@@ -4849,7 +4849,9 @@ static int gfx_v11_0_set_userq_eop_interrupts(struct amdgpu_device *adev, 
					return r;

			}

		}

	}



	if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) {

		for (m = 0; m < adev->gfx.mec.num_mec; ++m) {

			for (p = 0; p < adev->gfx.mec.num_pipe_per_mec; p++) {

				irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
@@ -4866,6 +4868,7 @@ static int gfx_v11_0_set_userq_eop_interrupts(struct amdgpu_device *adev, 
			}

		}

	}



	return 0;

}