Commit add69475 authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

perf/x86/msr: Switch to new Intel CPU model defines 



New CPU #defines encode vendor and family as well as model.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181503.41614-1-tony.luck%40intel.com
parent 9828a1cf

arch/x86/events/msr.c

+66 −66
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
#include <linux/perf_event.h>

#include <linux/sysfs.h>

#include <linux/nospec.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>

#include "probe.h"



enum perf_msr_id {
@@ -43,75 +43,75 @@ static bool test_intel(int idx, void *data) 
	    boot_cpu_data.x86 != 6)

		return false;



	switch (boot_cpu_data.x86_model) {

	case INTEL_FAM6_NEHALEM:

	case INTEL_FAM6_NEHALEM_G:

	case INTEL_FAM6_NEHALEM_EP:

	case INTEL_FAM6_NEHALEM_EX:



	case INTEL_FAM6_WESTMERE:

	case INTEL_FAM6_WESTMERE_EP:

	case INTEL_FAM6_WESTMERE_EX:



	case INTEL_FAM6_SANDYBRIDGE:

	case INTEL_FAM6_SANDYBRIDGE_X:



	case INTEL_FAM6_IVYBRIDGE:

	case INTEL_FAM6_IVYBRIDGE_X:



	case INTEL_FAM6_HASWELL:

	case INTEL_FAM6_HASWELL_X:

	case INTEL_FAM6_HASWELL_L:

	case INTEL_FAM6_HASWELL_G:



	case INTEL_FAM6_BROADWELL:

	case INTEL_FAM6_BROADWELL_D:

	case INTEL_FAM6_BROADWELL_G:

	case INTEL_FAM6_BROADWELL_X:

	case INTEL_FAM6_SAPPHIRERAPIDS_X:

	case INTEL_FAM6_EMERALDRAPIDS_X:

	case INTEL_FAM6_GRANITERAPIDS_X:

	case INTEL_FAM6_GRANITERAPIDS_D:



	case INTEL_FAM6_ATOM_SILVERMONT:

	case INTEL_FAM6_ATOM_SILVERMONT_D:

	case INTEL_FAM6_ATOM_AIRMONT:



	case INTEL_FAM6_ATOM_GOLDMONT:

	case INTEL_FAM6_ATOM_GOLDMONT_D:

	case INTEL_FAM6_ATOM_GOLDMONT_PLUS:

	case INTEL_FAM6_ATOM_TREMONT_D:

	case INTEL_FAM6_ATOM_TREMONT:

	case INTEL_FAM6_ATOM_TREMONT_L:



	case INTEL_FAM6_XEON_PHI_KNL:

	case INTEL_FAM6_XEON_PHI_KNM:

	switch (boot_cpu_data.x86_vfm) {

	case INTEL_NEHALEM:

	case INTEL_NEHALEM_G:

	case INTEL_NEHALEM_EP:

	case INTEL_NEHALEM_EX:



	case INTEL_WESTMERE:

	case INTEL_WESTMERE_EP:

	case INTEL_WESTMERE_EX:



	case INTEL_SANDYBRIDGE:

	case INTEL_SANDYBRIDGE_X:



	case INTEL_IVYBRIDGE:

	case INTEL_IVYBRIDGE_X:



	case INTEL_HASWELL:

	case INTEL_HASWELL_X:

	case INTEL_HASWELL_L:

	case INTEL_HASWELL_G:



	case INTEL_BROADWELL:

	case INTEL_BROADWELL_D:

	case INTEL_BROADWELL_G:

	case INTEL_BROADWELL_X:

	case INTEL_SAPPHIRERAPIDS_X:

	case INTEL_EMERALDRAPIDS_X:

	case INTEL_GRANITERAPIDS_X:

	case INTEL_GRANITERAPIDS_D:



	case INTEL_ATOM_SILVERMONT:

	case INTEL_ATOM_SILVERMONT_D:

	case INTEL_ATOM_AIRMONT:



	case INTEL_ATOM_GOLDMONT:

	case INTEL_ATOM_GOLDMONT_D:

	case INTEL_ATOM_GOLDMONT_PLUS:

	case INTEL_ATOM_TREMONT_D:

	case INTEL_ATOM_TREMONT:

	case INTEL_ATOM_TREMONT_L:



	case INTEL_XEON_PHI_KNL:

	case INTEL_XEON_PHI_KNM:

		if (idx == PERF_MSR_SMI)

			return true;

		break;



	case INTEL_FAM6_SKYLAKE_L:

	case INTEL_FAM6_SKYLAKE:

	case INTEL_FAM6_SKYLAKE_X:

	case INTEL_FAM6_KABYLAKE_L:

	case INTEL_FAM6_KABYLAKE:

	case INTEL_FAM6_COMETLAKE_L:

	case INTEL_FAM6_COMETLAKE:

	case INTEL_FAM6_ICELAKE_L:

	case INTEL_FAM6_ICELAKE:

	case INTEL_FAM6_ICELAKE_X:

	case INTEL_FAM6_ICELAKE_D:

	case INTEL_FAM6_TIGERLAKE_L:

	case INTEL_FAM6_TIGERLAKE:

	case INTEL_FAM6_ROCKETLAKE:

	case INTEL_FAM6_ALDERLAKE:

	case INTEL_FAM6_ALDERLAKE_L:

	case INTEL_FAM6_ATOM_GRACEMONT:

	case INTEL_FAM6_RAPTORLAKE:

	case INTEL_FAM6_RAPTORLAKE_P:

	case INTEL_FAM6_RAPTORLAKE_S:

	case INTEL_FAM6_METEORLAKE:

	case INTEL_FAM6_METEORLAKE_L:

	case INTEL_SKYLAKE_L:

	case INTEL_SKYLAKE:

	case INTEL_SKYLAKE_X:

	case INTEL_KABYLAKE_L:

	case INTEL_KABYLAKE:

	case INTEL_COMETLAKE_L:

	case INTEL_COMETLAKE:

	case INTEL_ICELAKE_L:

	case INTEL_ICELAKE:

	case INTEL_ICELAKE_X:

	case INTEL_ICELAKE_D:

	case INTEL_TIGERLAKE_L:

	case INTEL_TIGERLAKE:

	case INTEL_ROCKETLAKE:

	case INTEL_ALDERLAKE:

	case INTEL_ALDERLAKE_L:

	case INTEL_ATOM_GRACEMONT:

	case INTEL_RAPTORLAKE:

	case INTEL_RAPTORLAKE_P:

	case INTEL_RAPTORLAKE_S:

	case INTEL_METEORLAKE:

	case INTEL_METEORLAKE_L:

		if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)

			return true;

		break;