Commit af06adb5 authored by Tommaso Merciai's avatar Tommaso Merciai Committed by Geert Uytterhoeven
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arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU node 



Add the Mali-G52 GPU node to the SoC DTSI.

Signed-off-by: default avatarTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250402131142.1270701-4-tommaso.merciai.xr@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 5ecd5a82

arch/arm64/boot/dts/renesas/r9a09g047.dtsi

+49 −0
Original line number Diff line number Diff line
@@ -105,6 +105,35 @@ L3_CA55: cache-controller-0 { 
		};

	};



	gpu_opp_table: opp-table-1 {

		compatible = "operating-points-v2";



		opp-630000000 {

			opp-hz = /bits/ 64 <630000000>;

			opp-microvolt = <800000>;

		};



		opp-315000000 {

			opp-hz = /bits/ 64 <315000000>;

			opp-microvolt = <800000>;

		};



		opp-157500000 {

			opp-hz = /bits/ 64 <157500000>;

			opp-microvolt = <800000>;

		};



		opp-78750000 {

			opp-hz = /bits/ 64 <78750000>;

			opp-microvolt = <800000>;

		};



		opp-19687500 {

			opp-hz = /bits/ 64 <19687500>;

			opp-microvolt = <800000>;

		};

	};



	psci {

		compatible = "arm,psci-1.0", "arm,psci-0.2";

		method = "smc";
@@ -491,6 +520,26 @@ i2c8: i2c@11c01000 { 
			status = "disabled";

		};



		gpu: gpu@14850000 {

			compatible = "renesas,r9a09g047-mali",

				     "arm,mali-bifrost";

			reg = <0x0 0x14850000 0x0 0x10000>;

			interrupts = <GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "job", "mmu", "gpu", "event";

			clocks = <&cpg CPG_MOD 0xf0>,

				 <&cpg CPG_MOD 0xf1>,

				 <&cpg CPG_MOD 0xf2>;

			clock-names = "gpu", "bus", "bus_ace";

			power-domains = <&cpg>;

			resets = <&cpg 0xdd>, <&cpg 0xde>, <&cpg 0xdf>;

			reset-names = "rst", "axi_rst", "ace_rst";

			operating-points-v2 = <&gpu_opp_table>;

			status = "disabled";

		};



		gic: interrupt-controller@14900000 {

			compatible = "arm,gic-v3";

			reg = <0x0 0x14900000 0 0x20000>,