Commit b00b08a5 authored by Rohit Visavalia's avatar Rohit Visavalia Committed by Stephen Boyd
Browse files

dt-bindings: clock: xilinx: Add reset GPIO for VCU 



It is marked as optional as some of the ZynqMP designs are having vcu_reset
(reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another
PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by
axi_gpio or PS GPIO so there will be no GPIO entry.

Signed-off-by: default avatarRohit Visavalia <rohit.visavalia@amd.com>
Link: https://lore.kernel.org/r/20250107044038.100945-3-rohit.visavalia@amd.com


Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b51adc77

Documentation/devicetree/bindings/clock/xlnx,vcu.yaml

+4 −0
Original line number Diff line number Diff line
@@ -33,6 +33,9 @@ properties: 
      - const: pll_ref

      - const: aclk



  reset-gpios:

    maxItems: 1



required:

  - reg

  - clocks
@@ -49,6 +52,7 @@ examples: 
        xlnx_vcu: vcu@a0040000 {

            compatible = "xlnx,vcu-logicoreip-1.0";

            reg = <0x0 0xa0040000 0x0 0x1000>;

            reset-gpios = <&gpio 78 GPIO_ACTIVE_HIGH>;

            clocks = <&si570_1>, <&clkc 71>;

            clock-names = "pll_ref", "aclk";

        };