Commit babdb815 authored by Marijn Suijten's avatar Marijn Suijten Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Pass catalog pointers in RM to replace for-loop ID lookups 



The Resource Manager already iterates over all available blocks from the
catalog, only to pass their ID to a dpu_hw_xxx_init() function which
uses an _xxx_offset() helper to search for and find the exact same
catalog pointer again to initialize the block with, fallible error
handling and all.

Instead, pass const pointers to the catalog entries directly to these
_init functions and drop the for loops entirely, saving on both
readability complexity and unnecessary cycles at boot.

Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/533861/
Link: https://lore.kernel.org/r/20230418-dpu-drop-useless-for-lookup-v3-3-e8d869eea455@somainline.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 94fdd55b

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

+8 −29
Original line number Diff line number Diff line
@@ -53,23 +53,6 @@ static const u32 fetch_tbl[SSPP_MAX] = {CTL_INVALID_BIT, 16, 17, 18, 19, 
	CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, 0,

	1, 2, 3, CTL_INVALID_BIT, CTL_INVALID_BIT};



static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,

		const struct dpu_mdss_cfg *m,

		void __iomem *addr,

		struct dpu_hw_blk_reg_map *b)

{

	int i;



	for (i = 0; i < m->ctl_count; i++) {

		if (ctl == m->ctl[i].id) {

			b->blk_addr = addr + m->ctl[i].base;

			b->log_mask = DPU_DBG_MASK_CTL;

			return &m->ctl[i];

		}

	}

	return ERR_PTR(-ENOMEM);

}



static int _mixer_stages(const struct dpu_lm_cfg *mixer, int count,

		enum dpu_lm lm)

{
@@ -676,29 +659,25 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops, 
		ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;

};



struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,

struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,

		void __iomem *addr,

		const struct dpu_mdss_cfg *m)

		u32 mixer_count,

		const struct dpu_lm_cfg *mixer)

{

	struct dpu_hw_ctl *c;

	const struct dpu_ctl_cfg *cfg;



	c = kzalloc(sizeof(*c), GFP_KERNEL);

	if (!c)

		return ERR_PTR(-ENOMEM);



	cfg = _ctl_offset(idx, m, addr, &c->hw);

	if (IS_ERR_OR_NULL(cfg)) {

		kfree(c);

		pr_err("failed to create dpu_hw_ctl %d\n", idx);

		return ERR_PTR(-EINVAL);

	}

	c->hw.blk_addr = addr + cfg->base;

	c->hw.log_mask = DPU_DBG_MASK_CTL;



	c->caps = cfg;

	_setup_ctl_ops(&c->ops, c->caps->features);

	c->idx = idx;

	c->mixer_count = m->mixer_count;

	c->mixer_hw_caps = m->mixer;

	c->idx = cfg->id;

	c->mixer_count = mixer_count;

	c->mixer_hw_caps = mixer;



	return c;

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

+8 −6
Original line number Diff line number Diff line
@@ -261,15 +261,17 @@ static inline struct dpu_hw_ctl *to_dpu_hw_ctl(struct dpu_hw_blk *hw) 
}



/**

 * dpu_hw_ctl_init(): Initializes the ctl_path hw driver object.

 * should be called before accessing every ctl path registers.

 * @idx:  ctl_path index for which driver object is required

 * dpu_hw_ctl_init() - Initializes the ctl_path hw driver object.

 * Should be called before accessing any ctl_path register.

 * @cfg:  ctl_path catalog entry for which driver object is required

 * @addr: mapped register io address of MDP

 * @m :   pointer to mdss catalog data

 * @mixer_count: Number of mixers in @mixer

 * @mixer: Pointer to an array of Layer Mixers defined in the catalog

 */

struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,

struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,

		void __iomem *addr,

		const struct dpu_mdss_cfg *m);

		u32 mixer_count,

		const struct dpu_lm_cfg *mixer);



/**

 * dpu_hw_ctl_destroy(): Destroys ctl driver context

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c

+5 −27
Original line number Diff line number Diff line
@@ -175,24 +175,6 @@ static void dpu_hw_dsc_bind_pingpong_blk( 
	DPU_REG_WRITE(c, dsc_ctl_offset, mux_cfg);

}



static const struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,

				       const struct dpu_mdss_cfg *m,

				       void __iomem *addr,

				       struct dpu_hw_blk_reg_map *b)

{

	int i;



	for (i = 0; i < m->dsc_count; i++) {

		if (dsc == m->dsc[i].id) {

			b->blk_addr = addr + m->dsc[i].base;

			b->log_mask = DPU_DBG_MASK_DSC;

			return &m->dsc[i];

		}

	}



	return NULL;

}



static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,

			   unsigned long cap)

{
@@ -203,23 +185,19 @@ static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops, 
		ops->dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;

};



struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,

				   const struct dpu_mdss_cfg *m)

struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,

				   void __iomem *addr)

{

	struct dpu_hw_dsc *c;

	const struct dpu_dsc_cfg *cfg;



	c = kzalloc(sizeof(*c), GFP_KERNEL);

	if (!c)

		return ERR_PTR(-ENOMEM);



	cfg = _dsc_offset(idx, m, addr, &c->hw);

	if (IS_ERR_OR_NULL(cfg)) {

		kfree(c);

		return ERR_PTR(-EINVAL);

	}

	c->hw.blk_addr = addr + cfg->base;

	c->hw.log_mask = DPU_DBG_MASK_DSC;



	c->idx = idx;

	c->idx = cfg->id;

	c->caps = cfg;

	_setup_dsc_ops(&c->ops, c->caps->features);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h

+5 −6
Original line number Diff line number Diff line
@@ -61,14 +61,13 @@ struct dpu_hw_dsc { 
};



/**

 * dpu_hw_dsc_init - initializes the dsc block for the passed dsc idx.

 * @idx:  DSC index for which driver object is required

 * dpu_hw_dsc_init() - Initializes the DSC hw driver object.

 * @cfg:  DSC catalog entry for which driver object is required

 * @addr: Mapped register io address of MDP

 * @m:    Pointer to mdss catalog data

 * Returns: Error code or allocated dpu_hw_dsc context

 * Return: Error code or allocated dpu_hw_dsc context

 */

struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,

				   const struct dpu_mdss_cfg *m);

struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,

		void __iomem *addr);



/**

 * dpu_hw_dsc_destroy - destroys dsc driver context

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c

+6 −32
Original line number Diff line number Diff line
@@ -68,49 +68,23 @@ static void _setup_dspp_ops(struct dpu_hw_dspp *c, 
		c->ops.setup_pcc = dpu_setup_dspp_pcc;

}



static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,

		const struct dpu_mdss_cfg *m,

		void __iomem *addr,

		struct dpu_hw_blk_reg_map *b)

{

	int i;



	if (!m || !addr || !b)

		return ERR_PTR(-EINVAL);



	for (i = 0; i < m->dspp_count; i++) {

		if (dspp == m->dspp[i].id) {

			b->blk_addr = addr + m->dspp[i].base;

			b->log_mask = DPU_DBG_MASK_DSPP;

			return &m->dspp[i];

		}

	}



	return ERR_PTR(-EINVAL);

}



struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx,

			void __iomem *addr,

			const struct dpu_mdss_cfg *m)

struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,

			void __iomem *addr)

{

	struct dpu_hw_dspp *c;

	const struct dpu_dspp_cfg *cfg;



	if (!addr || !m)

	if (!addr)

		return ERR_PTR(-EINVAL);



	c = kzalloc(sizeof(*c), GFP_KERNEL);

	if (!c)

		return ERR_PTR(-ENOMEM);



	cfg = _dspp_offset(idx, m, addr, &c->hw);

	if (IS_ERR_OR_NULL(cfg)) {

		kfree(c);

		return ERR_PTR(-EINVAL);

	}

	c->hw.blk_addr = addr + cfg->base;

	c->hw.log_mask = DPU_DBG_MASK_DSPP;



	/* Assign ops */

	c->idx = idx;

	c->idx = cfg->id;

	c->cap = cfg;

	_setup_dspp_ops(c, c->cap->features);