Commit bcf77a70 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/8xx: Allow setting DATA alignment even with STRICT_KERNEL_RWX 



It is now possible to not pin kernel text with a 8Mbytes TLB, so
the alignment for STRICT_KERNEL_RWX can be relaxed.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/d0d8b05012b392dd166cfd911f14ba2741ce7e1e.1724173828.git.christophe.leroy@csgroup.eu
parent 1a736d98

arch/powerpc/Kconfig

+5 −5
Original line number Diff line number Diff line
@@ -853,8 +853,8 @@ config DATA_SHIFT_BOOL 
	bool "Set custom data alignment"

	depends on ADVANCED_OPTIONS

	depends on STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE

	depends on PPC_BOOK3S_32 || (PPC_8xx && !PIN_TLB_DATA && !STRICT_KERNEL_RWX) || \

		   PPC_85xx

	depends on (PPC_8xx && !PIN_TLB_DATA && (!STRICT_KERNEL_RWX || !PIN_TLB_TEXT)) || \

		   PPC_BOOK3S_32 || PPC_85xx

	help

	  This option allows you to set the kernel data alignment. When

	  RAM is mapped by blocks, the alignment needs to fit the size and
@@ -870,9 +870,9 @@ config DATA_SHIFT 
	range 20 24 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_85xx

	default 22 if STRICT_KERNEL_RWX && PPC_BOOK3S_32

	default 18 if (DEBUG_PAGEALLOC || KFENCE) && PPC_BOOK3S_32

	default 23 if STRICT_KERNEL_RWX && PPC_8xx

	default 23 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && PIN_TLB_DATA

	default 19 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx

	default 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && \

		      (PIN_TLB_DATA || PIN_TLB_TEXT)

	default 19 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_8xx

	default 24 if STRICT_KERNEL_RWX && PPC_85xx

	default PAGE_SHIFT

	help