Commit bdb97897 authored by Michael Riesch's avatar Michael Riesch Committed by Vinod Koul
Browse files

phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant 



The Rockchip RK3588 MIPI CSI-2 DPHY can be supported using the existing
phy-rockchip-inno-csidphy driver, the notable differences being
 - the control bits in the GRF
 - the additional reset line
Add support for this variant.

Signed-off-by: default avatarMichael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-6-a4f340a7f0cf@collabora.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 26043515

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

+28 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ 
#define RK3568_GRF_VI_CON0		0x0340

#define RK3568_GRF_VI_CON1		0x0344



#define RK3588_CSIDPHY_GRF_CON0		0x0000



/* PHY */

#define CSIDPHY_CTRL_LANE_ENABLE		0x00

#define CSIDPHY_CTRL_LANE_ENABLE_CK		BIT(6)
@@ -117,6 +119,12 @@ static const struct dphy_reg rk3568_grf_dphy_regs[] = { 
	[GRF_DPHY_CSIPHY_CLKLANE_EN] = PHY_REG(RK3568_GRF_VI_CON0, 1, 8),

};



static const struct dphy_reg rk3588_grf_dphy_regs[] = {

	[GRF_DPHY_CSIPHY_FORCERXMODE] = PHY_REG(RK3588_CSIDPHY_GRF_CON0, 4, 0),

	[GRF_DPHY_CSIPHY_DATALANE_EN] = PHY_REG(RK3588_CSIDPHY_GRF_CON0, 4, 4),

	[GRF_DPHY_CSIPHY_CLKLANE_EN] = PHY_REG(RK3588_CSIDPHY_GRF_CON0, 1, 8),

};



struct hsfreq_range {

	u32 range_h;

	u8 cfg_bit;
@@ -183,6 +191,11 @@ static const char *const rk3368_reset_names[] = { 
	"apb"

};



static const char *const rk3588_reset_names[] = {

	"apb",

	"phy"

};



static void rockchip_inno_csidphy_ths_settle(struct rockchip_inno_csidphy *priv,

					     int hsfreq, int offset)

{
@@ -390,6 +403,17 @@ static const struct dphy_drv_data rk3568_mipidphy_drv_data = { 
	.resets_num = ARRAY_SIZE(rk3368_reset_names),

};



static const struct dphy_drv_data rk3588_mipidphy_drv_data = {

	.pwrctl_offset = -1,

	.ths_settle_offset = RK3568_CSIDPHY_CLK_WR_THS_SETTLE,

	.calib_offset = RK3568_CSIDPHY_CLK_CALIB_EN,

	.hsfreq_ranges = rk1808_mipidphy_hsfreq_ranges,

	.num_hsfreq_ranges = ARRAY_SIZE(rk1808_mipidphy_hsfreq_ranges),

	.grf_regs = rk3588_grf_dphy_regs,

	.resets = rk3588_reset_names,

	.resets_num = ARRAY_SIZE(rk3588_reset_names),

};



static const struct of_device_id rockchip_inno_csidphy_match_id[] = {

	{

		.compatible = "rockchip,px30-csi-dphy",
@@ -411,6 +435,10 @@ static const struct of_device_id rockchip_inno_csidphy_match_id[] = { 
		.compatible = "rockchip,rk3568-csi-dphy",

		.data = &rk3568_mipidphy_drv_data,

	},

	{

		.compatible = "rockchip,rk3588-csi-dphy",

		.data = &rk3588_mipidphy_drv_data,

	},

	{}

};

MODULE_DEVICE_TABLE(of, rockchip_inno_csidphy_match_id);