Commit bdf3f417 authored by Yeoreum Yun's avatar Yeoreum Yun Committed by Catalin Marinas
Browse files

arm64: Fix cleared E0POE bit after cpu_suspend()/resume() 



TCR2_ELx.E0POE is set during smp_init().
However, this bit is not reprogrammed when the CPU enters suspension and
later resumes via cpu_resume(), as __cpu_setup() does not re-enable E0POE
and there is no save/restore logic for the TCR2_ELx system register.

As a result, the E0POE feature no longer works after cpu_resume().

To address this, save and restore TCR2_EL1 in the cpu_suspend()/cpu_resume()
path, rather than adding related logic to __cpu_setup(), taking into account
possible future extensions of the TCR2_ELx feature.

Fixes: bf83dae9 ("arm64: enable the Permission Overlay Extension for EL0")
Cc: <stable@vger.kernel.org> # 6.12.x
Signed-off-by: default avatarYeoreum Yun <yeoreum.yun@arm.com>
Reviewed-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: default avatarKevin Brodsky <kevin.brodsky@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 5fcd5513

arch/arm64/include/asm/suspend.h

+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
#ifndef __ASM_SUSPEND_H

#define __ASM_SUSPEND_H



#define NR_CTX_REGS 13

#define NR_CTX_REGS 14

#define NR_CALLEE_SAVED_REGS 12



/*

arch/arm64/mm/proc.S

+8 −0
Original line number Diff line number Diff line
@@ -110,6 +110,10 @@ SYM_FUNC_START(cpu_do_suspend) 
	 * call stack.

	 */

	str	x18, [x0, #96]

alternative_if ARM64_HAS_TCR2

	mrs	x2, REG_TCR2_EL1

	str	x2, [x0, #104]

alternative_else_nop_endif

	ret

SYM_FUNC_END(cpu_do_suspend)
@@ -144,6 +148,10 @@ SYM_FUNC_START(cpu_do_resume) 
	msr	tcr_el1, x8

	msr	vbar_el1, x9

	msr	mdscr_el1, x10

alternative_if ARM64_HAS_TCR2

	ldr	x2, [x0, #104]

	msr	REG_TCR2_EL1, x2

alternative_else_nop_endif



	msr	sctlr_el1, x12

	set_this_cpu_offset x13