Commit c001f9c9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a77970: Use common cpg_lock 



R-Car Gen3 Socs use the common CPG/MSSR library functions in
rcar-cpg-lib.c, so the R-Car V3M sub-driver can use the common cpg_lock
instead of a driver-private lock.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/0cd9b5ffbe986bd7dc4ffb3f13492123432ee2e1.1716975021.git.geert+renesas@glider.be
parent 7c8730df

drivers/clk/renesas/r8a77970-cpg-mssr.c

+1 −4
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <dt-bindings/clock/r8a77970-cpg-mssr.h>



#include "renesas-cpg-mssr.h"

#include "rcar-cpg-lib.h"

#include "rcar-gen3-cpg.h"



#define CPG_SD0CKCR		0x0074
@@ -47,8 +48,6 @@ enum clk_ids { 
	MOD_CLK_BASE

};



static spinlock_t cpg_lock;



static const struct clk_div_table cpg_sd0h_div_table[] = {

	{  0,  2 }, {  1,  3 }, {  2,  4 }, {  3,  6 },

	{  4,  8 }, {  5, 12 }, {  6, 16 }, {  7, 18 },
@@ -213,8 +212,6 @@ static int __init r8a77970_cpg_mssr_init(struct device *dev) 
	if (error)

		return error;



	spin_lock_init(&cpg_lock);



	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];



	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);