Commit c094c536 authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Vignesh Raghavendra
Browse files

arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card 

Add overlay for PCIe (uses the second instance of PCIe in AM654x) and
USB3.0 SERDES personality card

The PCIe3/USB3 card is provided with the AM65x GP EVM configuration [1]
so apply the overlay to k3-am654-gp-evm.dtb

[1] https://www.ti.com/lit/ug/spruim7/spruim7.pdf



Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-3-70bae3e91597@kernel.org


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 32b366a5

arch/arm64/boot/dts/ti/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -45,7 +45,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo 
dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo



# Boards with AM65x SoC

k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo

k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb \

	k3-am654-base-board-rocktech-rk101-panel.dtbo \

	k3-am654-pcie-usb3.dtbo

k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo

k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo

dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
@@ -59,6 +61,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb 
dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo

dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo

dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb3.dtbo



# Boards with J7200 SoC

k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo

arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso

0 → 100644
+61 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only OR MIT

/**

 * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM

 *

 * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/

 */



/dts-v1/;

/plugin/;

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/phy/phy.h>

#include <dt-bindings/phy/phy-am654-serdes.h>



#include "k3-pinctrl.h"



&serdes1 {

	status = "okay";

};



&pcie1_rc {

	num-lanes = <1>;

	phys = <&serdes1 PHY_TYPE_PCIE 0>;

	phy-names = "pcie-phy0";

	reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;

	status = "okay";

};



&main_pmx0 {

	usb0_pins_default: usb0-default-pins {

		pinctrl-single,pins = <

			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */

		>;

	};

};



&serdes0 {

	status = "okay";

	assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;

	assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;

};



&dwc3_0 {

	status = "okay";

	assigned-clock-parents = <&k3_clks 151 4>,      /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */

	<&k3_clks 151 8>;      /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */

	phys = <&serdes0 PHY_TYPE_USB3 0>;

	phy-names = "usb3-phy";

};



&usb0 {

	pinctrl-names = "default";

	pinctrl-0 = <&usb0_pins_default>;

	dr_mode = "host";

	maximum-speed = "super-speed";

	snps,dis-u1-entry-quirk;

	snps,dis-u2-entry-quirk;

};



&usb0_phy {

	status = "okay";

};