Commit c15291e2 authored by Harsh Jain's avatar Harsh Jain Committed by Herbert Xu
Browse files

firmware: zynqmp: Move crypto API's to separate file 



For better maintainability move crypto related API's to
new zynqmp-crypto.c file.

Signed-off-by: default avatarHarsh Jain <h.jain@amd.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 1ccc00d7

drivers/firmware/xilinx/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

# Makefile for Xilinx firmwares



obj-$(CONFIG_ZYNQMP_FIRMWARE) += zynqmp.o zynqmp-ufs.o

obj-$(CONFIG_ZYNQMP_FIRMWARE) += zynqmp.o zynqmp-ufs.o zynqmp-crypto.o

obj-$(CONFIG_ZYNQMP_FIRMWARE_DEBUG) += zynqmp-debug.o

drivers/firmware/xilinx/zynqmp-crypto.c

0 → 100644
+59 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Firmware layer for XilSecure APIs.

 *

 * Copyright (C) 2014-2022 Xilinx, Inc.

 * Copyright (C) 2022-2025 Advanced Micro Devices, Inc.

 */



#include <linux/firmware/xlnx-zynqmp.h>

#include <linux/module.h>



/**

 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using

 * AES-GCM core.

 * @address:	Address of the AesParams structure.

 * @out:	Returned output value

 *

 * Return:	Returns status, either success or error code.

 */

int zynqmp_pm_aes_engine(const u64 address, u32 *out)

{

	u32 ret_payload[PAYLOAD_ARG_CNT];

	int ret;



	if (!out)

		return -EINVAL;



	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address),

				  lower_32_bits(address));

	*out = ret_payload[1];



	return ret;

}

EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);



/**

 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash

 * @address:	Address of the data/ Address of output buffer where

 *		hash should be stored.

 * @size:	Size of the data.

 * @flags:

 *		BIT(0) - for initializing csudma driver and SHA3(Here address

 *		and size inputs can be NULL).

 *		BIT(1) - to call Sha3_Update API which can be called multiple

 *		times when data is not contiguous.

 *		BIT(2) - to get final hash of the whole updated data.

 *		Hash will be overwritten at provided address with

 *		48 bytes.

 *

 * Return:	Returns status, either success or error code.

 */

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)

{

	u32 lower_addr = lower_32_bits(address);

	u32 upper_addr = upper_32_bits(address);



	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags);

}

EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);

drivers/firmware/xilinx/zynqmp.c

+0 −49
Original line number Diff line number Diff line
@@ -1521,30 +1521,6 @@ int zynqmp_pm_load_pdi(const u32 src, const u64 address) 
}

EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);



/**

 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using

 * AES-GCM core.

 * @address:	Address of the AesParams structure.

 * @out:	Returned output value

 *

 * Return:	Returns status, either success or error code.

 */

int zynqmp_pm_aes_engine(const u64 address, u32 *out)

{

	u32 ret_payload[PAYLOAD_ARG_CNT];

	int ret;



	if (!out)

		return -EINVAL;



	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address),

				  lower_32_bits(address));

	*out = ret_payload[1];



	return ret;

}

EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);



/**

 * zynqmp_pm_efuse_access - Provides access to efuse memory.

 * @address:	Address of the efuse params structure
@@ -1569,31 +1545,6 @@ int zynqmp_pm_efuse_access(const u64 address, u32 *out) 
}

EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access);



/**

 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash

 * @address:	Address of the data/ Address of output buffer where

 *		hash should be stored.

 * @size:	Size of the data.

 * @flags:

 *	BIT(0) - for initializing csudma driver and SHA3(Here address

 *		 and size inputs can be NULL).

 *	BIT(1) - to call Sha3_Update API which can be called multiple

 *		 times when data is not contiguous.

 *	BIT(2) - to get final hash of the whole updated data.

 *		 Hash will be overwritten at provided address with

 *		 48 bytes.

 *

 * Return:	Returns status, either success or error code.

 */

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)

{

	u32 lower_addr = lower_32_bits(address);

	u32 upper_addr = upper_32_bits(address);



	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags);

}

EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);



/**

 * zynqmp_pm_register_notifier() - PM API for register a subsystem

 *                                to be notified about specific

include/linux/firmware/xlnx-zynqmp-crypto.h

0 → 100644
+28 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Firmware layer for XilSECURE APIs.

 *

 *  Copyright (C) 2014-2022 Xilinx, Inc.

 *  Copyright (C) 2022-2025 Advanced Micro Devices, Inc.

 */



#ifndef __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__

#define __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__



#if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)

int zynqmp_pm_aes_engine(const u64 address, u32 *out);

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);

#else

static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)

{

	return -ENODEV;

}



static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,

				     const u32 flags)

{

	return -ENODEV;

}

#endif



#endif /* __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__ */

include/linux/firmware/xlnx-zynqmp.h

+1 −13
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 


#include <linux/err.h>

#include <linux/firmware/xlnx-zynqmp-ufs.h>

#include <linux/firmware/xlnx-zynqmp-crypto.h>



#define ZYNQMP_PM_VERSION_MAJOR	1

#define ZYNQMP_PM_VERSION_MINOR	0
@@ -589,9 +590,7 @@ int zynqmp_pm_release_node(const u32 node); 
int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,

			      const u32 qos,

			      const enum zynqmp_pm_request_ack ack);

int zynqmp_pm_aes_engine(const u64 address, u32 *out);

int zynqmp_pm_efuse_access(const u64 address, u32 *out);

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);

int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);

int zynqmp_pm_fpga_get_status(u32 *value);

int zynqmp_pm_fpga_get_config_status(u32 *value);
@@ -772,22 +771,11 @@ static inline int zynqmp_pm_set_requirement(const u32 node, 
	return -ENODEV;

}



static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)

{

	return -ENODEV;

}



static inline int zynqmp_pm_efuse_access(const u64 address, u32 *out)

{

	return -ENODEV;

}



static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,

				     const u32 flags)

{

	return -ENODEV;

}



static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size,

				      const u32 flags)

{