Commit c335bc06 authored by Max Merchel's avatar Max Merchel Committed by Frank Li
Browse files

ARM: dts: imx6qdl-tqma6: add boot phase properties



dtschema/schemas/bootph.yaml describe various node usage during
boot phases with DT.

TQMa6 need eMMC, I2C, GPIO, regulator and QSPI access during
boot process.

Signed-off-by: default avatarMax Merchel <Max.Merchel@ew.tq-group.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
parent 1ea07b5a
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+11 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ &ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	bootph-pre-ram;
	status = "okay";

	m25p80: flash@0 {
@@ -19,6 +20,7 @@ m25p80: flash@0 {
		spi-max-frequency = <50000000>;
		vcc-supply = <&sw4_reg>;
		m25p,fast-read;
		bootph-pre-ram;

		partitions {
			compatible = "fixed-partitions";
@@ -28,6 +30,10 @@ partitions {
	};
};

&gpio3 {
	bootph-pre-ram;
};

&iomuxc {
	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
@@ -38,6 +44,7 @@ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
			 /* eCSPI1 SS1 */
			MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
		>;
		bootph-pre-ram;
	};

	pinctrl_i2c1: i2c1grp {
@@ -45,6 +52,7 @@ pinctrl_i2c1: i2c1grp {
			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
		>;
		bootph-pre-ram;
	};

	pinctrl_i2c1_recovery: i2c1recoverygrp {
@@ -73,6 +81,7 @@ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
		>;
		bootph-all;
	};
};

@@ -117,6 +126,7 @@ sw4_reg: sw4 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
			bootph-pre-ram;
		};

		reg_5v_600mA: swbst {
@@ -186,6 +196,7 @@ &usdhc3 {
	bus-width = <8>;
	#address-cells = <1>;
	#size-cells = <0>;
	bootph-all;
	status = "okay";

	mmccard: mmccard@0 {
+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ &i2c1 {
	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <100000>;
	bootph-pre-ram;
	status = "okay";

	pmic: pmic@8 {
+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ &i2c3 {
	scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	clock-frequency = <100000>;
	bootph-pre-ram;
	status = "okay";

	pmic: pmic@8 {
@@ -40,6 +41,7 @@ pinctrl_i2c3: i2c3grp {
			MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
		>;
		bootph-pre-ram;
	};

	pinctrl_i2c3_recovery: i2c3recoverygrp {