Commit c5917458 authored by Xianwei Zhao's avatar Xianwei Zhao Committed by Jerome Brunet
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clk: meson: s4: fix pwm_j_div parent clock



Update peripherals pwm_j_div's parent clock to pwm_j_mux

Fixes: 57b55c76 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240516071612.2978201-1-xianwei.zhao@amlogic.com


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent c1380adf
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+1 −1
Original line number Diff line number Diff line
@@ -2978,7 +2978,7 @@ static struct clk_regmap s4_pwm_j_div = {
		.name = "pwm_j_div",
		.ops = &clk_regmap_divider_ops,
		.parent_hws = (const struct clk_hw *[]) {
			&s4_pwm_h_mux.hw
			&s4_pwm_j_mux.hw
		},
		.num_parents = 1,
		.flags = CLK_SET_RATE_PARENT,