Commit c76431e3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_mm_for_v6.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 mm updates from Borislav Petkov:

 - Use the proper accessors when reading CR3 as part of the page level
   transitions (5-level to 4-level, the use case being kexec) so that
   only the physical address in CR3 is picked up and not flags which are
   above the physical mask shift

 - Clean up and unify __phys_addr_symbol() definitions

* tag 'x86_mm_for_v6.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  efi/libstub: Fix page table access in 5-level to 4-level paging transition
  x86/boot: Fix page table access in 5-level to 4-level paging transition
  x86/mm: Unify __phys_addr_symbol()
parents a9a10e92 84361123

arch/x86/boot/compressed/pgtable_64.c

+7 −4
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
#include <asm/bootparam.h>

#include <asm/bootparam_utils.h>

#include <asm/e820/types.h>

#include <asm/pgtable.h>

#include <asm/processor.h>

#include "../string.h"

#include "efi.h"
@@ -168,9 +169,10 @@ asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable) 
		 * For 4- to 5-level paging transition, set up current CR3 as

		 * the first and the only entry in a new top-level page table.

		 */

		*trampoline_32bit = __native_read_cr3() | _PAGE_TABLE_NOENC;

		*trampoline_32bit = native_read_cr3_pa() | _PAGE_TABLE_NOENC;

	} else {

		unsigned long src;

		u64 *new_cr3;

		pgd_t *pgdp;



		/*

		 * For 5- to 4-level paging transition, copy page table pointed
@@ -180,8 +182,9 @@ asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable) 
		 * We cannot just point to the page table from trampoline as it

		 * may be above 4G.

		 */

		src = *(unsigned long *)__native_read_cr3() & PAGE_MASK;

		memcpy(trampoline_32bit, (void *)src, PAGE_SIZE);

		pgdp = (pgd_t *)native_read_cr3_pa();

		new_cr3 = (u64 *)(native_pgd_val(pgdp[0]) & PTE_PFN_MASK);

		memcpy(trampoline_32bit, new_cr3, PAGE_SIZE);

	}



	toggle_la57(trampoline_32bit);

arch/x86/include/asm/page_64.h

+11 −3
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <asm/alternative.h>



#include <linux/kmsan-checks.h>

#include <linux/mmdebug.h>



/* duplicated to the one in bootmem.h */

extern unsigned long max_pfn;
@@ -31,13 +32,20 @@ static __always_inline unsigned long __phys_addr_nodebug(unsigned long x) 


#ifdef CONFIG_DEBUG_VIRTUAL

extern unsigned long __phys_addr(unsigned long);

extern unsigned long __phys_addr_symbol(unsigned long);

#else

#define __phys_addr(x)		__phys_addr_nodebug(x)

#define __phys_addr_symbol(x) \

	((unsigned long)(x) - __START_KERNEL_map + phys_base)

#endif



static inline unsigned long __phys_addr_symbol(unsigned long x)

{

	unsigned long y = x - __START_KERNEL_map;



	/* only check upper bounds since lower bounds will trigger carry */

	VIRTUAL_BUG_ON(y >= KERNEL_IMAGE_SIZE);



	return y + phys_base;

}



#define __phys_reloc_hide(x)	(x)



void clear_page_orig(void *page);

arch/x86/mm/physaddr.c

+0 −11
Original line number Diff line number Diff line
@@ -31,17 +31,6 @@ unsigned long __phys_addr(unsigned long x) 
	return x;

}

EXPORT_SYMBOL(__phys_addr);



unsigned long __phys_addr_symbol(unsigned long x)

{

	unsigned long y = x - __START_KERNEL_map;



	/* only check upper bounds since lower bounds will trigger carry */

	VIRTUAL_BUG_ON(y >= KERNEL_IMAGE_SIZE);



	return y + phys_base;

}

EXPORT_SYMBOL(__phys_addr_symbol);

#endif



bool __virt_addr_valid(unsigned long x)

drivers/firmware/efi/libstub/x86-5lvl.c

+2 −2
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ void efi_5level_switch(void) 
	bool have_la57 = native_read_cr4() & X86_CR4_LA57;

	bool need_toggle = want_la57 ^ have_la57;

	u64 *pgt = (void *)la57_toggle + PAGE_SIZE;

	u64 *cr3 = (u64 *)__native_read_cr3();

	pgd_t *cr3 = (pgd_t *)native_read_cr3_pa();

	u64 *new_cr3;



	if (!la57_toggle || !need_toggle)
@@ -82,7 +82,7 @@ void efi_5level_switch(void) 
		new_cr3[0] = (u64)cr3 | _PAGE_TABLE_NOENC;

	} else {

		/* take the new root table pointer from the current entry #0 */

		new_cr3 = (u64 *)(cr3[0] & PAGE_MASK);

		new_cr3 = (u64 *)(native_pgd_val(cr3[0]) & PTE_PFN_MASK);



		/* copy the new root table if it is not 32-bit addressable */

		if ((u64)new_cr3 > U32_MAX)