Commit c812c91b authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Shawn Guo
Browse files

ARM: dts: imx6q-prtwd2: configure ethernet reference clock parent 



On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 2c23a919

arch/arm/boot/dts/imx6q-prtwd2.dts

+14 −3
Original line number Diff line number Diff line
@@ -22,6 +22,13 @@ memory@80000000 { 
		reg = <0x80000000 0x20000000>;

	};



	clk50m_phy: phy-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-output-names = "enet_ref_pad";

	};



	usdhc2_wifi_pwrseq: usdhc2_wifi_pwrseq {

		compatible = "mmc-pwrseq-simple";

		pinctrl-names = "default";
@@ -49,13 +56,17 @@ &can1 { 
	status = "okay";

};



&clks {

	clocks = <&clk50m_phy>;

	clock-names = "enet_ref_pad";

	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;

	assigned-clock-parents = <&clk50m_phy>;

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rmii";

	clocks = <&clks IMX6QDL_CLK_ENET>,

		 <&clks IMX6QDL_CLK_ENET>;

	clock-names = "ipg", "ahb";

	status = "okay";



	fixed-link {