Unverified Commit ca8f96ff authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v6.18/soc-signed' of... 

Merge tag 'omap-for-v6.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/arm

ARM: OMAP: SoC: updates for v6.18

* tag 'omap-for-v6.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
  ARM: OMAP2+: clock: convert from round_rate() to determine_rate()
  ARM: OMAP1: clock: convert from round_rate() to determine_rate()
  arm: omap2: use string choices helper
  ARM: OMAP2+: pm33xx-core: ix device node reference leaks in amx3_idle_init
  ARM: OMAP2+: use IS_ERR_OR_NULL() helper
  ARM: AM33xx: Implement TI advisory 1.0.36 (EMU0/EMU1 pins state on reset)

Link: https://lore.kernel.org/r/7h7bxup0ob.fsf@baylibre.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1cdfe53d bb676996

arch/arm/mach-omap1/clock.c

+13 −6
Original line number Diff line number Diff line
@@ -705,14 +705,21 @@ static unsigned long omap1_clk_recalc_rate(struct clk_hw *hw, unsigned long p_ra 
	return clk->rate;

}



static long omap1_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate)

static int omap1_clk_determine_rate(struct clk_hw *hw,

				    struct clk_rate_request *req)

{

	struct omap1_clk *clk = to_omap1_clk(hw);



	if (clk->round_rate != NULL)

		return clk->round_rate(clk, rate, p_rate);

	if (clk->round_rate != NULL) {

		req->rate = clk->round_rate(clk, req->rate,

					    &req->best_parent_rate);



	return omap1_clk_recalc_rate(hw, *p_rate);

		return 0;

	}



	req->rate = omap1_clk_recalc_rate(hw, req->best_parent_rate);



	return 0;

}



static int omap1_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate)
@@ -771,7 +778,7 @@ const struct clk_ops omap1_clk_gate_ops = { 


const struct clk_ops omap1_clk_rate_ops = {

	.recalc_rate	= omap1_clk_recalc_rate,

	.round_rate	= omap1_clk_round_rate,

	.determine_rate = omap1_clk_determine_rate,

	.set_rate	= omap1_clk_set_rate,

	.init		= omap1_clk_init_op,

};
@@ -784,7 +791,7 @@ const struct clk_ops omap1_clk_full_ops = { 
	.disable_unused	= omap1_clk_disable_unused,

#endif

	.recalc_rate	= omap1_clk_recalc_rate,

	.round_rate	= omap1_clk_round_rate,

	.determine_rate = omap1_clk_determine_rate,

	.set_rate	= omap1_clk_set_rate,

	.init		= omap1_clk_init_op,

};

arch/arm/mach-omap2/am33xx-restart.c

+36 −0
Original line number Diff line number Diff line
@@ -2,12 +2,46 @@ 
/*

 * am33xx-restart.c - Code common to all AM33xx machines.

 */

#include <dt-bindings/pinctrl/am33xx.h>

#include <linux/delay.h>

#include <linux/kernel.h>

#include <linux/reboot.h>



#include "common.h"

#include "control.h"

#include "prm.h"



/*

 * Advisory 1.0.36 EMU0 and EMU1: Terminals Must be Pulled High Before

 * ICEPick Samples

 *

 * If EMU0/EMU1 pins have been used as GPIO outputs and actively driving low

 * level, the device might not reboot in normal mode. We are in a bad position

 * to override GPIO state here, so just switch the pins into EMU input mode

 * (that's what reset will do anyway) and wait a bit, because the state will be

 * latched 190 ns after reset.

 */

static void am33xx_advisory_1_0_36(void)

{

	u32 emu0 = omap_ctrl_readl(AM335X_PIN_EMU0);

	u32 emu1 = omap_ctrl_readl(AM335X_PIN_EMU1);



	/* If both pins are in EMU mode, nothing to do */

	if (!(emu0 & 7) && !(emu1 & 7))

		return;



	/* Switch GPIO3_7/GPIO3_8 into EMU0/EMU1 modes respectively */

	omap_ctrl_writel(emu0 & ~7, AM335X_PIN_EMU0);

	omap_ctrl_writel(emu1 & ~7, AM335X_PIN_EMU1);



	/*

	 * Give pull-ups time to load the pin/PCB trace capacity.

	 * 5 ms shall be enough to load 1 uF (would be huge capacity for these

	 * pins) with TI-recommended 4k7 external pull-ups.

	 */

	mdelay(5);

}



/**

 * am33xx_restart - trigger a software restart of the SoC

 * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
@@ -18,6 +52,8 @@ 
 */

void am33xx_restart(enum reboot_mode mode, const char *cmd)

{

	am33xx_advisory_1_0_36();



	/* TODO: Handle cmd if necessary */

	prm_reboot_mode = mode;

arch/arm/mach-omap2/board-n8x0.c

+1 −1
Original line number Diff line number Diff line
@@ -167,7 +167,7 @@ static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, 


#ifdef CONFIG_MMC_DEBUG

	dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,

		power_on ? "on" : "off", vdd);

		str_on_off(power_on), vdd);

#endif

	if (slot == 0) {

		if (!power_on)

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

+7 −5
Original line number Diff line number Diff line
@@ -70,8 +70,8 @@ static unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, 
 * Some might argue L3-DDR, others ARM, others IVA. This code is simple and

 * just uses the ARM rates.

 */

static long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,

			       unsigned long *parent_rate)

static int omap2_determine_rate_to_table(struct clk_hw *hw,

					 struct clk_rate_request *req)

{

	const struct prcm_config *ptr;

	long highest_rate;
@@ -87,10 +87,12 @@ static long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, 
		highest_rate = ptr->mpu_speed;



		/* Can check only after xtal frequency check */

		if (ptr->mpu_speed <= rate)

		if (ptr->mpu_speed <= req->rate)

			break;

	}

	return highest_rate;

	req->rate = highest_rate;



	return 0;

}



/* Sets basic clocks based on the specified rate */
@@ -215,7 +217,7 @@ static void omap2xxx_clkt_vps_late_init(void) 
static const struct clk_ops virt_prcm_set_ops = {

	.recalc_rate	= &omap2_table_mpu_recalc,

	.set_rate	= &omap2_select_table_rate,

	.round_rate	= &omap2_round_to_table_rate,

	.determine_rate = &omap2_determine_rate_to_table,

};



/**

arch/arm/mach-omap2/pm33xx-core.c

+5 −1
Original line number Diff line number Diff line
@@ -388,12 +388,15 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu) 
		if (!state_node)

			break;



		if (!of_device_is_available(state_node))

		if (!of_device_is_available(state_node)) {

			of_node_put(state_node);

			continue;

		}



		if (i == CPUIDLE_STATE_MAX) {

			pr_warn("%s: cpuidle states reached max possible\n",

				__func__);

			of_node_put(state_node);

			break;

		}
@@ -403,6 +406,7 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu) 
			states[state_count].wfi_flags |= WFI_FLAG_WAKE_M3 |

							 WFI_FLAG_FLUSH_CACHE;



		of_node_put(state_node);

		state_count++;

	}