Commit d0fc5bf9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-fixes-for-v7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux 

Pull gpio fixes from Bartosz Golaszewski:

 - fix a regression in gpio-rockchip introduced on older chips during
   the merge window when converting to dynamic GPIO base

 - fix AST2700 debounce selector bit definitions in gpio-aspeed

* tag 'gpio-fixes-for-v7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: aspeed: fix AST2700 debounce selector bit definitions
  gpio: rockchip: Fix GPIO regression after conversion to dynamic base allocation
parents 1fe93b2a e31eee4a

drivers/gpio/gpio-aspeed.c

+2 −2
Original line number Diff line number Diff line
@@ -42,8 +42,8 @@ 
#define GPIO_G7_CTRL_IRQ_TYPE1 BIT(4)

#define GPIO_G7_CTRL_IRQ_TYPE2 BIT(5)

#define GPIO_G7_CTRL_RST_TOLERANCE BIT(6)

#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(7)

#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(8)

#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(7)

#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(8)

#define GPIO_G7_CTRL_INPUT_MASK BIT(9)

#define GPIO_G7_CTRL_IRQ_STS BIT(12)

#define GPIO_G7_CTRL_IN_DATA BIT(13)

drivers/gpio/gpio-rockchip.c

+1 −1
Original line number Diff line number Diff line
@@ -617,7 +617,7 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank) 
			return -ENODEV;



		ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,

					     gc->base, gc->ngpio);

					     bank->pin_base, bank->nr_pins);

		if (ret) {

			dev_err(bank->dev, "Failed to add pin range\n");

			goto fail;