Commit d46ede31 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pmdomain updates from Ulf Hansson:
 "pmdomain core:
   - Add support for HW-managed devices

  pmdomain providers:
   - amlogic: Add support for the A5 and the A4 power domains
   - arm: Enable system wakeups for the SCMI PM domain
   - qcom/clk: Add HW-mode callbacks to allow switching of GDSC mode

  pmdomain consumers:
   - qcom/media/venus: Enable support for switching GDSC HW-mode on V6"

* tag 'pmdomain-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  pmdomain: amlogic: Constify struct meson_secure_pwrc_domain_desc
  venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode on V6
  clk: qcom: videocc: Use HW_CTRL_TRIGGER for SM8250, SC7280 vcodec GDSC's
  clk: qcom: gdsc: Add set and get hwmode callbacks to switch GDSC mode
  PM: domains: Add the domain HW-managed mode to the summary
  PM: domains: Allow devices attached to genpd to be managed by HW
  pmdomain: amlogic: Add support for A5 power domains controller
  dt-bindings: power: add Amlogic A5 power domains
  pmdomain: amlogic: add missing MODULE_DESCRIPTION() macros
  pmdomain: arm: scmi_pm_domain: set flag GENPD_FLAG_ACTIVE_WAKEUP
  pmdomain: renesas: rmobile-sysc: Use for_each_child_of_node_scoped()
  pmdomain: core: Use genpd_is_irq_safe() helper
  pmdomain: amlogic: Add support for A4 power domains controller
  dt-bindings: power: add Amlogic A4 power domains
parents c6e63a98 67ce905f
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+2 −0
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ properties:
    enum:
      - amlogic,meson-a1-pwrc
      - amlogic,meson-s4-pwrc
      - amlogic,a4-pwrc
      - amlogic,a5-pwrc
      - amlogic,c3-pwrc
      - amlogic,t7-pwrc

+41 −0
Original line number Diff line number Diff line
@@ -363,6 +363,43 @@ static int gdsc_disable(struct generic_pm_domain *domain)
	return 0;
}

static int gdsc_set_hwmode(struct generic_pm_domain *domain, struct device *dev, bool mode)
{
	struct gdsc *sc = domain_to_gdsc(domain);
	int ret;

	ret = gdsc_hwctrl(sc, mode);
	if (ret)
		return ret;

	/*
	 * Wait for the GDSC to go through a power down and
	 * up cycle. If we poll the status register before the
	 * power cycle is finished we might read incorrect values.
	 */
	udelay(1);

	/*
	 * When the GDSC is switched to HW mode, HW can disable the GDSC.
	 * When the GDSC is switched back to SW mode, the GDSC will be enabled
	 * again, hence we need to poll for GDSC to complete the power up.
	 */
	if (!mode)
		return gdsc_poll_status(sc, GDSC_ON);

	return 0;
}

static bool gdsc_get_hwmode(struct generic_pm_domain *domain, struct device *dev)
{
	struct gdsc *sc = domain_to_gdsc(domain);
	u32 val;

	regmap_read(sc->regmap, sc->gdscr, &val);

	return !!(val & HW_CONTROL_MASK);
}

static int gdsc_init(struct gdsc *sc)
{
	u32 mask, val;
@@ -451,6 +488,10 @@ static int gdsc_init(struct gdsc *sc)
		sc->pd.power_off = gdsc_disable;
	if (!sc->pd.power_on)
		sc->pd.power_on = gdsc_enable;
	if (sc->flags & HW_CTRL_TRIGGER) {
		sc->pd.set_hwmode_dev = gdsc_set_hwmode;
		sc->pd.get_hwmode_dev = gdsc_get_hwmode;
	}

	ret = pm_genpd_init(&sc->pd, NULL, !on);
	if (ret)
+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ struct gdsc {
#define ALWAYS_ON	BIT(6)
#define RETAIN_FF_ENABLE	BIT(7)
#define NO_RET_PERIPH	BIT(8)
#define HW_CTRL_TRIGGER	BIT(9)
	struct reset_controller_dev	*rcdev;
	unsigned int			*resets;
	unsigned int			reset_count;
+1 −1
Original line number Diff line number Diff line
@@ -236,7 +236,7 @@ static struct gdsc mvs0_gdsc = {
		.name = "mvs0_gdsc",
	},
	.pwrsts = PWRSTS_OFF_ON,
	.flags = HW_CTRL | RETAIN_FF_ENABLE,
	.flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE,
};

static struct gdsc mvsc_gdsc = {
+2 −2
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ static struct gdsc mvs0_gdsc = {
	.pd = {
		.name = "mvs0_gdsc",
	},
	.flags = HW_CTRL,
	.flags = HW_CTRL_TRIGGER,
	.pwrsts = PWRSTS_OFF_ON,
};

@@ -302,7 +302,7 @@ static struct gdsc mvs1_gdsc = {
	.pd = {
		.name = "mvs1_gdsc",
	},
	.flags = HW_CTRL,
	.flags = HW_CTRL_TRIGGER,
	.pwrsts = PWRSTS_OFF_ON,
};

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