Commit d4da08ea authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

Merge tag 'renesas-r9a09g047-dt-binding-defs-tag3' into renesas-clk-for-v6.16 

Renesas RZ/G3E XSPI and GBETH Core DT Binding Definitions

XSPI and Gigabit Ethernet PTP reference core clock DT binding
definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and
DT source files.
parents aff664cc f21923f3

include/dt-bindings/clock/renesas,r9a09g047-cpg.h

+3 −0
Original line number Diff line number Diff line
@@ -17,5 +17,8 @@ 
#define R9A09G047_CM33_CLK0			6

#define R9A09G047_CST_0_SWCLKTCK		7

#define R9A09G047_IOTOP_0_SHCLK			8

#define R9A09G047_SPI_CLK_SPI			9

#define R9A09G047_GBETH_0_CLK_PTP_REF_I		10

#define R9A09G047_GBETH_1_CLK_PTP_REF_I		11



#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */