Commit d55b0d2e authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel
Browse files

iommu/amd: Remove PPR support 



Remove PPR handler and notifier related functions as its not used
anymore. Note that we are retaining PPR interrupt handler support
as it will be re-used when we introduce IOPF support.

Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Reviewed-by: default avatarJerry Snitselaar <jsnitsel@redhat.com>
Tested-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20231006095706.5694-3-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 5a0b11a1

drivers/iommu/amd/amd_iommu.h

+0 −2
Original line number Diff line number Diff line
@@ -52,8 +52,6 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, 
int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev);

void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev);



int amd_iommu_register_ppr_notifier(struct notifier_block *nb);

int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);

int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid, u64 address);

void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);

void amd_iommu_domain_update(struct protection_domain *domain);

drivers/iommu/amd/amd_iommu_types.h

+0 −13
Original line number Diff line number Diff line
@@ -509,19 +509,6 @@ extern struct kmem_cache *amd_iommu_irq_cache; 
#define APERTURE_RANGE_INDEX(a)	((a) >> APERTURE_RANGE_SHIFT)

#define APERTURE_PAGE_INDEX(a)	(((a) >> 21) & 0x3fULL)



/*

 * This struct is used to pass information about

 * incoming PPR faults around.

 */

struct amd_iommu_fault {

	u64 address;    /* IO virtual address of the fault*/

	u32 pasid;      /* Address space identifier */

	u32 sbdf;	/* Originating PCI device id */

	u16 tag;        /* PPR tag */

	u16 flags;      /* Fault flags */



};





struct amd_iommu;

struct iommu_domain;

drivers/iommu/amd/iommu.c

+1 −44
Original line number Diff line number Diff line
@@ -64,7 +64,6 @@ LIST_HEAD(acpihid_map); 


const struct iommu_ops amd_iommu_ops;



static ATOMIC_NOTIFIER_HEAD(ppr_notifier);

int amd_iommu_max_glx_val = -1;



/*
@@ -815,24 +814,6 @@ static void iommu_poll_events(struct amd_iommu *iommu) 
	writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);

}



static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw)

{

	struct amd_iommu_fault fault;



	if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) {

		pr_err_ratelimited("Unknown PPR request received\n");

		return;

	}



	fault.address   = raw[1];

	fault.pasid     = PPR_PASID(raw[0]);

	fault.sbdf      = PCI_SEG_DEVID_TO_SBDF(iommu->pci_seg->id, PPR_DEVID(raw[0]));

	fault.tag       = PPR_TAG(raw[0]);

	fault.flags     = PPR_FLAGS(raw[0]);



	atomic_notifier_call_chain(&ppr_notifier, 0, &fault);

}



static void iommu_poll_ppr_log(struct amd_iommu *iommu)

{

	u32 head, tail;
@@ -878,8 +859,7 @@ static void iommu_poll_ppr_log(struct amd_iommu *iommu) 
		head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE;

		writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);



		/* Handle PPR entry */

		iommu_handle_ppr_entry(iommu, entry);

		/* TODO: PPR Handler will be added when we add IOPF support */



		/* Refresh ring-buffer information */

		head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
@@ -2545,29 +2525,6 @@ const struct iommu_ops amd_iommu_ops = { 
	}

};



/*****************************************************************************

 *

 * The next functions do a basic initialization of IOMMU for pass through

 * mode

 *

 * In passthrough mode the IOMMU is initialized and enabled but not used for

 * DMA-API translation.

 *

 *****************************************************************************/



/* IOMMUv2 specific functions */

int amd_iommu_register_ppr_notifier(struct notifier_block *nb)

{

	return atomic_notifier_chain_register(&ppr_notifier, nb);

}

EXPORT_SYMBOL(amd_iommu_register_ppr_notifier);



int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb)

{

	return atomic_notifier_chain_unregister(&ppr_notifier, nb);

}

EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier);



static int __flush_pasid(struct protection_domain *domain, u32 pasid,

			 u64 address, bool size)

{