Commit d57d72fd authored by Ciprian Marian Costea's avatar Ciprian Marian Costea Committed by Shawn Guo
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arm64: dts: s32g: add RTC node 



The RTC module on S32G2/S32G3 based SoCs is used as a wakeup source from
system suspend.

Signed-off-by: default avatarCiprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: default avatarMatthias Brugger <mbrugger@suse.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 06ee2f0e

arch/arm64/boot/dts/freescale/s32g2.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -114,6 +114,14 @@ soc@0 { 
		#size-cells = <1>;

		ranges = <0 0 0 0x80000000>;



		rtc0: rtc@40060000 {

			compatible = "nxp,s32g2-rtc";

			reg = <0x40060000 0x1000>;

			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 54>, <&clks 55>;

			clock-names = "ipg", "source0";

		};



		pinctrl: pinctrl@4009c240 {

			compatible = "nxp,s32g2-siul2-pinctrl";

				/* MSCR0-MSCR101 registers on siul2_0 */

arch/arm64/boot/dts/freescale/s32g3.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -171,6 +171,15 @@ soc@0 { 
		#size-cells = <1>;

		ranges = <0 0 0 0x80000000>;



		rtc0: rtc@40060000 {

			compatible = "nxp,s32g3-rtc",

				     "nxp,s32g2-rtc";

			reg = <0x40060000 0x1000>;

			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks 54>, <&clks 55>;

			clock-names = "ipg", "source0";

		};



		pinctrl: pinctrl@4009c240 {

			compatible = "nxp,s32g2-siul2-pinctrl";

				/* MSCR0-MSCR101 registers on siul2_0 */