Commit d6172405 authored by Dr. David Alan Gilbert's avatar Dr. David Alan Gilbert Committed by Alex Deucher
Browse files

drm/amd/display: Remove unused *vbios_smu_set_dprefclk 



rn_vbios_smu_set_dprefclk() was added in 2019 by
commit 4edb6fc9 ("drm/amd/display: Add Renoir clock manager")
rv1_vbios_smu_set_dprefclk() was also added in 2019 by
commit dc88b4a6 ("drm/amd/display: make clk mgr soc specific")

neither have been used.

Remove them.

Signed-off-by: default avatarDr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fbe6fa72

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c

+0 −14
Original line number Diff line number Diff line
@@ -142,17 +142,3 @@ int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_di 


	return actual_dispclk_set_mhz * 1000;

}
 


int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr)

{

	int actual_dprefclk_set_mhz = -1;



	actual_dprefclk_set_mhz = rv1_vbios_smu_send_msg_with_param(

			clk_mgr,

			VBIOSSMC_MSG_SetDprefclkFreq,

			khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz));



	/* TODO: add code for programing DP DTO, currently this is down by command table */



	return actual_dprefclk_set_mhz * 1000;

}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h

+0 −1
Original line number Diff line number Diff line
@@ -27,6 +27,5 @@ 
#define DAL_DC_DCN10_RV1_CLK_MGR_VBIOS_SMU_H_



int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);

int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);



#endif /* DAL_DC_DCN10_RV1_CLK_MGR_VBIOS_SMU_H_ */

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c

+0 −14
Original line number Diff line number Diff line
@@ -164,20 +164,6 @@ int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dis 
	return actual_dispclk_set_mhz * 1000;

}



int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr)

{

	int actual_dprefclk_set_mhz = -1;



	actual_dprefclk_set_mhz = rn_vbios_smu_send_msg_with_param(

			clk_mgr,

			VBIOSSMC_MSG_SetDprefclkFreq,

			khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz));



	/* TODO: add code for programing DP DTO, currently this is down by command table */



	return actual_dprefclk_set_mhz * 1000;

}



int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz)

{

	int actual_dcfclk_set_mhz = -1;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h

+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ enum dcn_pwr_state; 


int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);

int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);

int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);

int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);

int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz);

void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz);