Unverified Commit e11880b4 authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

dt-bindings: riscv: add Zvfh[min] ISA extension description 

Add description for Zvfh[min] ISA extension[1].

Link: https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view

 [1]
Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231114141256.126749-18-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 5dadda5e

Documentation/devicetree/bindings/riscv/extensions.yaml

+12 −0
Original line number Diff line number Diff line
@@ -369,6 +369,18 @@ properties: 
            instructions, as ratified in commit 56ed795 ("Update

            riscv-crypto-spec-vector.adoc") of riscv-crypto.



        - const: zvfh

          description:

            The standard Zvfh extension for vectored half-precision

            floating-point instructions, as ratified in commit e2ccd05

            ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.



        - const: zvfhmin

          description:

            The standard Zvfhmin extension for vectored minimal half-precision

            floating-point instructions, as ratified in commit e2ccd05

            ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.



        - const: zvkb

          description:

            The standard Zvkb extension for vector cryptography bit-manipulation