Commit e1a914ae authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/cdclk: Remove the assumption that cdclk divider==2 when using squashing



Currently we have a hardcoded assumption that the cdclk divider
(2*cd2x divider) is always 2 when squashing is used. While that
is true for all current platforms it might not hold in the future.
So eliminate the assumption and calculate the correct divider
from the other parameters.

v2: s/cd2x divider/cdclk divider/ (Gustavo)
    s/clock/unsquashed_cdclk/ (Gustavo)

Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211221636.29658-1-ville.syrjala@linux.intel.com
parent 25815473
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+5 −7
Original line number Diff line number Diff line
@@ -1880,9 +1880,9 @@ static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,
{
	int cdclk = cdclk_config->cdclk;
	int vco = cdclk_config->vco;
	u32 val;
	int unsquashed_cdclk;
	u16 waveform;
	int clock;
	u32 val;

	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco > 0 && vco > 0 &&
	    !cdclk_pll_is_unknown(dev_priv->display.cdclk.hw.vco)) {
@@ -1899,15 +1899,13 @@ static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,

	waveform = cdclk_squash_waveform(dev_priv, cdclk);

	if (waveform)
		clock = vco / 2;
	else
		clock = cdclk;
	unsquashed_cdclk = DIV_ROUND_CLOSEST(cdclk * cdclk_squash_len,
					     cdclk_squash_divider(waveform));

	if (HAS_CDCLK_SQUASH(dev_priv))
		dg2_cdclk_squash_program(dev_priv, waveform);

	val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
	val = bxt_cdclk_cd2x_div_sel(dev_priv, unsquashed_cdclk, vco) |
		bxt_cdclk_cd2x_pipe(dev_priv, pipe);

	/*